[U-Boot] PCI-E problems on Kilauea board

[Felix Radensky]

Hi,

I have several PCI-E related  problems on Kilauea board Rev 1.2

1. With u-boot v2009.01 and latest git I'm getting machine check
    exception when PCI-E card is plugged into slot 0. There's no
    problem if the same card is plugged into slot 1.

    This seems to be a regression introduced after 
2008.10-rc2-02699-g725c8dd
    (version shipped on AMCC resource CD), as with this version both slots
    function properly.

    Any hints what could be the problem with latest u-boots ?

U-Boot 2009.01-00336-g952a6bd (Feb 16 2009 - 16:29:56)

CPU:   AMCC PowerPC 405EX Rev. C at 600 MHz (PLB=200, OPB=100, EBC=100 MHz)
       Security support
       Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
       16 kB I-Cache 16 kB D-Cache
Board: Kilauea - AMCC PPC405EX Evaluation Board
I2C:   ready
DTT1:  31 C
DRAM:  256 MB
FLASH: 64 MB
NAND:  64 MiB
PCI:   Bus Dev VenId DevId Class Int
PCIE0: successfully set as root-complex
Machine Check Exception.
Caused by (from msr): regs 0fe9fc78 Data PLB Error
NIP: 00000000 XER: 00000000 LR: 0FFD8794 REGS: 0fe9fc78 TRAP: 0200 DEAR: 
00000000
MSR: 00000000 EE: 0 PR: 0 FP: 0 ME: 0 IR/DR: 00

GPR00: 00000000 0FE9FD68 0FE9FF44 B0000000 00000000 0FE9FD58 00000003 
00100004
GPR08: 00000000 A0000000 0FE9FD58 0000003A 07FFFFFC 7FF67EFF 0FFF1500 
10004000
GPR16: 74FEFFE7 0FFE000C 0FE9FE28 0FE9FE2A 0FE9FDB0 0FE9FDB4 0FE9FDBC 
0FFF0CC0
GPR24: 00000000 00000018 00000004 00000003 00100004 0FFF0CA8 0FFF1C10 
00000004
Call backtrace:
0FFF0CA8 0FFD86F8 0FFB4B28 0FFB6058 0FFB6118 0FFB5330 0FFB5404
0FFD2558 0FFD84A0 0FFB51C4 0FFA7F10 0FFA66A4
machine check


2. Another problem is that in bootstrap configuration B (CPU - 333 Mhz, 
PLB 166MHz)
    PCI-E cards are not recognized in any slot. This happens with all 
u-boot versions I've
    tested. Linux also does not recognize PCI-E cards. Kilauea board 
manual says that PCI
    clock is determined by CPLD. Could it be CPLD/FPGA bug ?

Thanks.

Felix.