[U-Boot] DRAM test problem

[Kim Phillips]

On Tue, 7 Jul 2009 15:01:05 -0300
Alemao <xcarandiru at gmail.com> wrote:

> On Mon, Jul 6, 2009 at 7:07 PM, Alemao<xcarandiru at gmail.com> wrote:
> > On Mon, Jul 6, 2009 at 3:45 PM, Scott Wood<scottwood at freescale.com> wrote:
> >> I believe data cache is disabled on 83xx in u-boot.
> >>
> >> -Scott
> >>
> >
> > So the time for MPC8343 makes sense??? It tooks that long?
> >
> > Data cache/instruction cache is inside e300c1 core, u-boot still have
> > to enable/support it?
> >
> > Any hint how could I do it in 83xx family?
> >
> > Im loosing a lot of performance and all boards needs to pass this test
> > before goes out...

maybe what you're testing for itself needs to be better defined..but in
the meanwhile, check out the CONFIG_*_HID0 assignments for your
board...they get used in cpu/mpc83xx/start.S - see how they're
configuring the caches.  See also previous discussions on this list.

Kim