[U-Boot] [PATCH] mpc512x: MPC5121ADS: Add NAND support

[Stefan Roese]

This patch adds NAND support to the MPC5121ADS board. Please
note that the image size increased since NAND support didn't
fit in the current image size (256k).

Signed-off-by: Stefan Roese <sr at denx.de>
Cc: Wolfgang Denk <wd at denx.de>
---
 board/freescale/mpc5121ads/mpc5121ads.c |   27 +++++++++++++++++++++++++++
 include/configs/mpc5121ads.h            |   22 +++++++++++++++++++++-
 2 files changed, 48 insertions(+), 1 deletions(-)

diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c
index 9d94c23..6c80cda 100644
--- a/board/freescale/mpc5121ads/mpc5121ads.c
+++ b/board/freescale/mpc5121ads/mpc5121ads.c
@@ -31,6 +31,9 @@
 #include <i2c.h>
 #endif
 
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+
 DECLARE_GLOBAL_DATA_PTR;
 
 extern void ide_set_reset(int idereset);
@@ -43,6 +46,7 @@ extern void ide_set_reset(int idereset);
 			 CLOCK_SCCR1_DDR_EN |				\
 			 CLOCK_SCCR1_FEC_EN |				\
 			 CLOCK_SCCR1_PATA_EN |				\
+			 CLOCK_SCCR1_NFC_EN |				\
 			 CLOCK_SCCR1_PCI_EN |				\
 			 CLOCK_SCCR1_TPR_EN)
 
@@ -55,6 +59,29 @@ extern void ide_set_reset(int idereset);
 #define CSAW_STOP(start, size)	(((start) + (size) - 1) >> 16)
 
 long int fixed_sdram(void);
+void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip);
+
+/* Active chip number set in board_nand_select_device() (mpc5121_nfc.c) */
+extern int mpc5121_nfc_chip;
+
+/* Control chips select signal on MPC5121ADS board */
+void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
+{
+	unsigned char *csreg = (u8 *)CONFIG_SYS_CPLD_BASE + 0x09;
+	u8 v;
+
+	v = in_8(csreg);
+	v |= 0x0F;
+
+	if (chip >= 0) {
+		__mpc5121_nfc_select_chip(mtd, 0);
+		v &= ~(1 << mpc5121_nfc_chip);
+	} else {
+		__mpc5121_nfc_select_chip(mtd, -1);
+	}
+
+	out_8(csreg, v);
+}
 
 int board_early_init_f (void)
 {
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index dff7f1a..45a004e 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -200,6 +200,26 @@
 #undef CONFIG_SYS_FLASH_CHECKSUM
 
 /*
+ * NAND FLASH
+ * drivers/mtd/nand/mpc5121_mpc.c (rev 2 silicon only)
+ */
+#define CONFIG_CMD_NAND
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE            0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE      2
+#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+/*
  * CPLD registers area is really only 32 bytes in size, but the smallest possible LP
  * window is 64KB
  */
@@ -222,7 +242,7 @@
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE	TEXT_BASE		/* Start of monitor */
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)		/* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)		/* Reserve 512 kB for Mon */
 #ifdef	CONFIG_FSL_DIU_FB
 #define CONFIG_SYS_MALLOC_LEN		(6 * 1024 * 1024)	/* Reserved for malloc */
 #else
-- 
1.6.3.2