[U-Boot] [PATCH 4/7] eSPI: make the chip selsec enable

[Mingkai Hu]

On the MPC8536 processor, the eSPI chip selects and
the eSDHC data interface have four pin-muxed pins
shared between them, so if the eSDHC data interface
is expanded to 8-bits, no eSPI chip selects are routed.

Signed-off-by: Mingkai Hu <Mingkai.hu at freescale.com>
---
 board/freescale/mpc8536ds/mpc8536ds.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 31c1e15..1f028c2 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -50,8 +50,7 @@ int board_early_init_f (void)
 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 
 	setbits_be32(&gur->pmuxcr,
-			(MPC85xx_PMUXCR_SD_DATA |
-			 MPC85xx_PMUXCR_SDHC_CD |
+			(MPC85xx_PMUXCR_SDHC_CD |
 			 MPC85xx_PMUXCR_SDHC_WP));
 
 #endif
-- 
1.5.4