[U-Boot] [PATCH 3/3] MPC85xx: Add MPC8569MDS board support

Wolfgang Denk wd at denx.de
Fri Mar 27 20:19:01 CET 2009


Dear Haiying Wang,

> diff --git a/board/freescale/mpc8569mds/ddr.c b/board/freescale/mpc8569mds/ddr.c
> new file mode 100644
> index 0000000..c4e63fb
> --- /dev/null
> +++ b/board/freescale/mpc8569mds/ddr.c
> @@ -0,0 +1,86 @@
> +/*
> + * Copyright 2009 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * Version 2 as published by the Free Software Foundation.
> + */
> +
> +#include <common.h>
> +#include <i2c.h>
> +
> +#include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_ddr_dimm_params.h>
> +
> +static void
> +get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
> +{
> +	i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
> +}
> +
> +
> +unsigned int fsl_ddr_get_mem_data_rate(void)
> +{
> +	return get_ddr_freq(0);
> +}
> +
> +void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
> +		      unsigned int ctrl_num)
> +{
> +	unsigned int i;
> +	unsigned int i2c_address = 0;
> +
> +	for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
> +		if (ctrl_num == 0 && i == 0) {
> +			i2c_address = SPD_EEPROM_ADDRESS1;
> +		}
> +		if (ctrl_num == 0 && i == 1) {
> +			i2c_address = SPD_EEPROM_ADDRESS2;
> +		}

No curly braces for single line statements, please.

> diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
> new file mode 100644
> index 0000000..1022724
> --- /dev/null
> +++ b/board/freescale/mpc8569mds/mpc8569mds.c
> @@ -0,0 +1,325 @@
...
> +phys_size_t
> +initdram(int board_type)
> +{
> +	long dram_size = 0;
> +
> +	puts("Initializing\n");
> +
> +#if defined(CONFIG_DDR_DLL)
> +	{

Please avoid this extra block here.

> +		/*
> +		 * Work around to stabilize DDR DLL MSYNC_IN.
> +		 * Errata DDR9 seems to have been fixed.
> +		 * This is now the workaround for Errata DDR11:
> +		 *    Override DLL = 1, Course Adj = 1, Tap Select = 0
> +		 */
> +
> +		volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);

Line too long.

> +
> +		gur->ddrdllcr = 0x81000000;
> +		asm("sync;isync;msync");
> +		udelay(200);
> +	}
> +#endif
> +
> +#ifdef CONFIG_SPD_EEPROM
> +	dram_size = fsl_ddr_sdram();
> +#else
> +        dram_size = fixed_sdram();
> +#endif

Indentation not by TAB.

> +
> +	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
> +	dram_size *= 0x100000;
> +
> +	puts("    DDR: ");
> +	return dram_size;
> +}
> +
> +#if !defined(CONFIG_SPD_EEPROM)
> +phys_size_t fixed_sdram(void)
> +{
> +	volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR;
> +	uint d_init;
> +
> +	ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;
> +	ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
> +	ddr->timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
> +	ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
> +	ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
> +	ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
> +	ddr->sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
> +	ddr->sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG_2;
> +	ddr->sdram_mode = CONFIG_SYS_DDR_SDRAM_MODE;
> +	ddr->sdram_mode_2 = CONFIG_SYS_DDR_SDRAM_MODE_2;
> +	ddr->sdram_interval = CONFIG_SYS_DDR_SDRAM_INTERVAL;
> +	ddr->sdram_data_init = CONFIG_SYS_DDR_DATA_INIT;
> +	ddr->sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
> +	ddr->timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4;
> +	ddr->timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5;
> +	ddr->ddr_zq_cntl =  CONFIG_SYS_DDR_ZQ_CNTL;
> +	ddr->ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL;
> +	ddr->sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG_2;
> +#if defined (CONFIG_DDR_ECC)
> +	ddr->err_int_en = CONFIG_SYS_DDR_ERR_INT_EN;
> +	ddr->err_disable = CONFIG_SYS_DDR_ERR_DIS;
> +	ddr->err_sbe = CONFIG_SYS_DDR_SBE;
> +#endif
> +	asm("sync;isync");

Please use accessor functions for register accesses (here and
averywhere). This will probably allow you to get rid of the
"sync;isync", too.


> +	udelay(500);
> +
> +	ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL;
> +#if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
> +	d_init = 1;
> +	debug("DDR - 1st controller: memory initializing\n");
> +	/*
> +	 * Poll until memory is initialized.
> +	 * 512 Meg at 400 might hit this 200 times or so.
> +	 */
> +	while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) {
> +		udelay(1000);
> +	}
> +	debug("DDR: memory initialized\n\n");
> +	asm("sync; isync");
> +	udelay(500);
> +#endif
> +	return 1024 * 1024 * 1024;

Why is no auto-sizing being used here?

> +}
> +#endif
> +
> +/*
> + * Initialize Local Bus
> + */
> +void
> +local_bus_init(void)
> +{
> +	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> +	volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
> +
> +	uint clkdiv;
> +	uint lbc_hz;
> +	sys_info_t sysinfo;
> +
> +	get_sys_info(&sysinfo);
> +	clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2;
> +	lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
> +
> +	gur->lbiuiplldcr1 = 0x00078080;

Please use accessor functions, see above.

> +	if (clkdiv == 16) {
> +		gur->lbiuiplldcr0 = 0x7c0f1bf0;
> +	} else if (clkdiv == 8) {
> +		gur->lbiuiplldcr0 = 0x6c0f1bf0;
> +	} else if (clkdiv == 4) {
> +		gur->lbiuiplldcr0 = 0x5c0f1bf0;
> +	}

No braces here.

...
> +pci_init_board(void)
> +{
> +	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> +	uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
> +	uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
> +
> +#ifdef CONFIG_PCIE1
> +{
> +	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
> +	struct pci_controller *hose = &pcie1_hose;
> +	int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
> +	struct pci_region *r = hose->regions;
> +
> +	int pcie_configured  = io_sel >= 1;

Please separate declarations and code. Its is more or less unreadable.
Also, lines are too long.

> +	if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
> +		printf ("\n    PCIE connected to slot as %s (base address %x)",
> +			pcie_ep ? "End Point" : "Root Complex",
> +			(uint)pci);
> +
> +		if (pci->pme_msg_det) {
> +			pci->pme_msg_det = 0xffffffff;
> +			debug (" with errors.  Clearing.  Now 0x%08x",pci->pme_msg_det);

Line too long. Check all files, please.

...
> diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
> new file mode 100644
> index 0000000..a759e05
> --- /dev/null
> +++ b/include/configs/MPC8569MDS.h
> @@ -0,0 +1,455 @@
...
> +#ifndef __ASSEMBLY__
> +extern unsigned long get_clock_freq(void);
> +#endif						  /*Replace a call to get_clock_freq (after it is implemented)*/
> +#define CONFIG_SYS_CLK_FREQ	66000000 /*TODO: restore if wanting to read from BCSR: get_clock_freq()*/ /* sysclk for MPC85xx */
> +#define CONFIG_DDR_CLK_FREQ	66000000

Line lenght!!!

> +#define	CONFIG_EXTRA_ENV_SETTINGS				        \
> +   "netdev=eth0\0"                                                      \
> +   "consoledev=ttyS0\0"                                                 \
> +   "ramdiskaddr=600000\0"                                               \
> +   "ramdiskfile=your.ramdisk.u-boot\0"					\
> +   "fdtaddr=400000\0"							\
> +   "fdtfile=your.fdt.dtb\0"						\
> +   "nfsargs=setenv bootargs root=/dev/nfs rw "				\
> +      "nfsroot=$serverip:$rootpath "					\
> +      "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
> +      "console=$consoledev,$baudrate $othbootargs\0"			\
> +   "ramargs=setenv bootargs root=/dev/ram rw "				\
> +      "console=$consoledev,$baudrate $othbootargs\0"			\
> +
> +#define CONFIG_NFSBOOTCOMMAND	                                        \
> +   "run nfsargs;"							\
> +   "tftp $loadaddr $bootfile;"                                          \
> +   "tftp $fdtaddr $fdtfile;"						\
> +   "bootm $loadaddr - $fdtaddr"
> +
> +
> +#define CONFIG_RAMBOOTCOMMAND \
> +   "run ramargs;"							\
> +   "tftp $ramdiskaddr $ramdiskfile;"                                    \
> +   "tftp $loadaddr $bootfile;"                                          \
> +   "bootm $loadaddr $ramdiskaddr"

Indentation by TAB, please.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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