[U-Boot] MPC850: strange problem with icache

Guowen SHAN shan.gavin at gmail.com
Mon Mar 30 02:56:20 CEST 2009


Dear Guowen SHAN,
>
> In message <cf7369060903290628p2768907p9a0c2e40c898601b at mail.gmail.com>
> you wrote:
> >
> > I'm porting u-boot-1.3.1 to customer board, which includes MPC850 and
> 32MB SDRAM.
> > When I turned off icache, bus can work correctly under 25MHz/50MHz clock
> frequence.
> > Note that CPU is working under 50MHz. However, the board only can work
> with bus
> > frequence of 25MHz with enabled icache. If I tried to set bus frequence
> to 50MHz with
> > enabled icache, it will crash with MCE.
>
> Easy problem - actually FAQ: please see
> http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation


I don't understand it completely. 25MHz with enabled icache  could use burst
to fecth instructions
from RAM, which should have proved the UPM words and initialization sequence
was ok, right?


> <http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation>
>
> > I don't know why. Since it can work at 25MHz with enabled icache, the UPM
> words seem
> > ok. Thanks for your advices!
>
> Keep in mind that the UPM setup is only part of the required RAM
> initialization sequence. Follow the instructions in the chip
> manufacturer's manual to the letter.
>
>
>


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