[U-Boot] MII register display

Jon Smirl jonsmirl at gmail.com
Thu May 7 04:06:46 CEST 2009


On Wed, May 6, 2009 at 10:03 PM, Mike Frysinger <vapier at gentoo.org> wrote:
> On Wednesday 06 May 2009 21:53:21 Jon Smirl wrote:
>> On Wed, May 6, 2009 at 2:57 PM, Jon Smirl <jonsmirl at gmail.com> wrote:
>> > Why is "speed selection = 10 Mbps" when both sides support 100Mb?
>> > Is uboot decoding this register correctly?
>> >
>> > uboot> mii dump 0 0
>> > 0.     (1000)                 -- PHY control register --
>> >  (8000:0000) 0.15    =     0    reset
>> >  (4000:0000) 0.14    =     0    loopback
>> >  (2040:0000) 0. 6,13 =   b00    speed selection = 10 Mbps
>>
>> This b00 here is confusing. b is a valid hex character, I thought this
>> was reporting the register value as 0xb00.
>> Instead it appears to be trying to indicate that the two bits are binary?
>
> looks that way.  it's showing bit6 and bit13.

It's in the source that way. It just confused me when trying to figure
out what is wrong with the new PHY we're having hardware trouble with.

I still haven't figure out why speed selection is 10Mb when the
auto-negotiate came up with 100Mb.

	if ((regno == 0) && (pdesc->lo == 6)) {
		ushort speed_bits = regval & PHY_BMCR_SPEED_MASK;
		printf("%2u,%2u =   b%u%u    speed selection = %s Mbps",
			6, 13,
			(regval >>  6) & 1,
			(regval >> 13) & 1,
			speed_bits == PHY_BMCR_1000_MBPS ? "1000" :
			speed_bits == PHY_BMCR_100_MBPS  ? "100" :
			speed_bits == PHY_BMCR_10_MBPS   ? "10" :
			"???");
		return 1;
	}



> -mike
>



-- 
Jon Smirl
jonsmirl at gmail.com


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