[U-Boot] MII register display

[Jerry Van Baren]

Hi Jon,

Jon Smirl wrote:
> On Wed, May 6, 2009 at 2:57 PM, Jon Smirl <jonsmirl at gmail.com> wrote:
>> Why is "speed selection = 10 Mbps" when both sides support 100Mb?
>> Is uboot decoding this register correctly?
>>
>> uboot> mii dump 0 0
>> 0.     (1000)                 -- PHY control register --
>>  (8000:0000) 0.15    =     0    reset
>>  (4000:0000) 0.14    =     0    loopback
>>  (2040:0000) 0. 6,13 =   b00    speed selection = 10 Mbps
> 
> This b00 here is confusing. b is a valid hex character, I thought this
> was reporting the register value as 0xb00.
> Instead it appears to be trying to indicate that the two bits are binary?

Yes.  The display confusion is rooted and aggravated by the fact that 
the two bits are not adjacent in the register (bits 6 and 13).

Looking at the rest of your dump, it isn't obvious to me why your PHY is 
running 10bT.  Mike's suggestion of turning on (and possibly adding) 
debug is a good one.

Since you mention you are trying to debug new PHY problems, I would be 
suspicious of the PHY signal integrity (hardware problem) or a PHY 
non-standard register problem (software).

WRT hardware / signal integrity, note that the autonegotiation 
communications is done using the "fast link pulses" which are *not* fast 
and do not require anywhere near the signal integrity that 10/100/1000bT 
requires.  Autonegotiation can work over bailing wire.

WRT software, the MII standard is a poster child for the saying "the 
beauty of standards is that there are so many novel ways to implement 
them."  :-/

[snip]

Best regards,
gvb