[U-Boot] [PATCH 5/6] ZOOM2 Add serial support.
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Fri May 8 21:36:43 CEST 2009
On 16:28 Thu 07 May , Tom Rix wrote:
> Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board.
> The default serial is from the USB connector on left side of the debug board.
> The USB connector will produce 2 of the 4 UARTS. On your host pick the first
> enumeration.
>
> The serial port set up is the same with Zoom1.
> Baud rate 115200, 8 bit data, no parity, 1 stop bit, no flow.
>
> The kernel bootargs are
> console=ttyS3,115200n8
>
> Signed-off-by: Tom Rix <Tom.Rix at windriver.com>
> ---
> board/omap3/zoom2/Makefile | 3 +-
> board/omap3/zoom2/zoom2.c | 35 ++++++++++
> board/omap3/zoom2/zoom2_serial.c | 130 ++++++++++++++++++++++++++++++++++++++
> board/omap3/zoom2/zoom2_serial.h | 75 ++++++++++++++++++++++
> common/serial.c | 2 +
> drivers/serial/ns16550.c | 4 +-
> include/configs/omap3_zoom2.h | 26 ++++----
> include/serial.h | 7 ++
> 8 files changed, 266 insertions(+), 16 deletions(-)
> create mode 100644 board/omap3/zoom2/zoom2_serial.c
> create mode 100644 board/omap3/zoom2/zoom2_serial.h
>
> diff --git a/board/omap3/zoom2/Makefile b/board/omap3/zoom2/Makefile
> index b8fa5a7..d27990c 100644
> --- a/board/omap3/zoom2/Makefile
> +++ b/board/omap3/zoom2/Makefile
> @@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk
> LIB = $(obj)lib$(BOARD).a
>
> COBJS := zoom2.o \
> - debug_board.o
> + debug_board.o \
> + zoom2_serial.o
>
> SRCS := $(COBJS:.o=.c)
> OBJS := $(addprefix $(obj),$(COBJS))
> diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c
> index 0700c56..dd0086c 100644
> --- a/board/omap3/zoom2/zoom2.c
> +++ b/board/omap3/zoom2/zoom2.c
> @@ -30,10 +30,29 @@
> */
> #include <common.h>
> #include <asm/io.h>
> +#include <asm/arch/mem.h>
> #include <asm/arch/mux.h>
> #include <asm/arch/sys_proto.h>
> #include <asm/mach-types.h>
> #include "zoom2.h"
> +#include "zoom2_serial.h"
> +
> +/*
> + * This the the zoom2, board specific, gpmc configuration for the
> + * quad uart on the debug board. The more general gpmc configurations
> + * are setup at the cpu level in cpu/arm_cortexa8/omap3/mem.c
> + */
> +extern void enable_gpmc_config(u32 *gpmc_config, gpmc_csx_t *gpmc_cs_base,
> + u32 base, u32 size);
> +
> +static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = {
> + 0x00011000,
> + 0x001F1F01,
> + 0x00080803,
> + 0x1D091D09,
> + 0x041D1F1F,
> + 0x1D0904C4, 0
> +};
>
Any chance to have comment at least about these value?
Best Regards,
J.
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