[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Sun May 10 22:39:41 CEST 2009
> >>
> >> +mx31pdk_nand_config : unconfig
> >> + @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> >> + @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> >> + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> >> + @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> >> + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> > IIRC no need it will generate from the config.h
>
> I don't understand the comment. What will generate what from config.h?
the automake.mk
>
> >> +
> >> omap2420h4_config : unconfig
> >> @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
> >>
> >> diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
> >> index d34dc02..dcaa09f 100644
> >> --- a/board/freescale/mx31pdk/config.mk
> >> +++ b/board/freescale/mx31pdk/config.mk
> >> @@ -1 +1,5 @@
> >> +ifdef CONFIG_NAND_SPL
> >> +TEXT_BASE = 0x87ec0000
> >> +else
> >> TEXT_BASE = 0x87f00000
> >> +endif
> >> +
> >> +.macro DELAY loops
> >> + ldr r2, =\loops
> >> +1:
> >> + subs r2, r2, #1
> >> + nop
> >> + bcs 1b
> >> +.endm
> > NACK
> > as already reply to the kirwood patch we must have common macro
> > please use the attached file as based work
>
> I don't see any file attached to you e-mail, so which attached file?
> Can you point to the relevant kirkwood patch? Is the patch in some
> git-tree?
no not yet
so I've forget to re-attached it
>
> >> +
> >> +.globl lowlevel_init
> >> +lowlevel_init:
> >> + /* Also setup the Peripheral Port Remap register inside the core */
> >> + ldr r0, =ARM_PPMRR /* start from AIPS 2GB region */
> >> + mcr p15, 0, r0, c15, c2, 4
> >> +
> > for all hard code value please use macro
> > and if possible macro to generate them
>
> Hmm. You want me to create a macro that expands to the above code?
no I mean macro for 0xB8001010, 0x0000000c, etc...
and if possible macro to generate these value
>
> >> + REG IPU_CONF, IPU_CONF_DI_EN
> >> + REG CCM_CCMR, 0x074B0BF5
> >> +
> >> + REG 0xB8001010, 0x0000000c
> >> +
Best Regards,
J.
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