[U-Boot] [patch arm/next] dm355 evm support (v2)
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Tue May 12 02:40:14 CEST 2009
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#include <common.h>
> +#include <nand.h>
> +#include <asm/io.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/emif_defs.h>
> +#include <asm/arch/nand_defs.h>
> +#include "../common/misc.h"
> +
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * With the DM355 EVM, u-boot is *always* a third stage loader,
> + * unless a JTAG debugger handles the first two stages:
> + *
> + * - 1st stage is ROM Boot Loader (RBL), which searches for a
> + * second stage loader in one of three places based on SW7:
> + * NAND (with MMC/SD fallback), MMC/SD, or UART.
> + *
> + * - 2nd stage is User Boot Loader (UBL), using at most 30KB
> + * of on-chip SRAM, responsible for lowlevel init, and for
> + * loading the third stage loader into DRAM.
> + *
> + * - 3rd stage, that's us!
> + */
> +
> +int board_init(void)
> +{
> + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM;
> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> + /* We expect the UBL to have handled "lowlevel init", which
> + * involves setting up at least:
> + * - clocks
> + * + PLL1 (for ARM and peripherals) and PLL2 (for DDR)
> + * + clock divisors for those PLLs
> + * + LPSC_DDR module enabled
> + * + LPSC_TIMER0 module (still) enabled
> + * - EMIF
> + * + DDR init and timings
> + * + AEMIF timings (for NAND and DM9000)
> + * - pinmux
> + *
> + * Some of that is repeated here, mostly as a precaution.
> + */
> +
> + /* AEMIF: Some "address" lines are available as GPIOs. A3..A13
> + * could be too if we used A12 as a GPIO during NAND chipselect
> + * (and Linux did too), letting us control the LED on A7/GPIO61.
> + */
> + REG(PINMUX2) = 0x0c08;
> +
> + /* UART0 may still be in SyncReset if we didn't boot from UART */
> + davinci_enable_uart0();
> +
> + /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */
> + lpsc_on(DAVINCI_LPSC_TPCC);
> + lpsc_on(DAVINCI_LPSC_TPTC0);
> + lpsc_on(DAVINCI_LPSC_TPTC1);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_NAND_DAVINCI
> +
> +#define BIT(x) (1 << (x))
please remove
or use set_bit
> +
> +static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip)
> +{
> + struct nand_chip *this = mtd->priv;
> + u32 wbase = (u32) this->IO_ADDR_W;
> + u32 rbase = (u32) this->IO_ADDR_R;
> +
> + if (chip == 1) {
> + wbase |= BIT(14);
> + rbase |= BIT(14);
> + } else {
> + wbase &= ~BIT(14);
> + rbase &= ~BIT(14);
> + }
> + this->IO_ADDR_W = (void *)wbase;
> + this->IO_ADDR_R = (void *)rbase;
> +}
> +
> +int board_nand_init(struct nand_chip *nand)
> +{
> + davinci_nand_init(nand);
> + nand->select_chip = nand_dm355evm_select_chip;
> + return 0;
> +}
> +
> +#endif
> --- /dev/null
> +++ b/include/configs/davinci_dm355evm.h
> @@ -0,0 +1,194 @@
> +/*
> +#define DM9000_IO CONFIG_DM9000_BASE
> +#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
> +
> +/* I2C */
> +#define CONFIG_HARD_I2C
> +#define CONFIG_DRIVER_DAVINCI_I2C
> +#define CONFIG_SYS_I2C_SPEED 400000
> +#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
> +
> +/* NAND: socketed, two chipselects, normally 2 GBytes */
> +/* NYET -- #define CONFIG_NAND_DAVINCI */
> +#define CONFIG_SYS_NAND_HW_ECC
> +#define CONFIG_SYS_NAND_USE_FLASH_BBT
> +
> +/*#define CONFIG_SYS_NAND_SMALLPAGE */
please remove if no need
> +#define CONFIG_SYS_NAND_LARGEPAGE
> +#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
> +/* socket has two chipselects, nCE0 gated by address BIT(14) */
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_MAX_CHIPS 2
> +
> +/* USB: OTG connector */
> +/* #define CONFIG_USB_DAVINCI */
please remove if no need
> +
> +/* U-Boot command configuration */
> +#include <config_cmd_default.h>
> +
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FLASH
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_SETGETDCR
> +
> +#define CONFIG_CMD_ASKENV
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_I2C
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_SAVES
> +
> +#ifdef CONFIG_NAND_DAVINCI
> +#define CONFIG_CMD_MTDPARTS
> +#define CONFIG_MTD_PARTITIONS
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_UBI
> +#define CONFIG_RBTREE
> +#endif
> +
> +/* TEMPORARY -- no safe place to save env, yet */
> +#define CONFIG_ENV_IS_NOWHERE
> +#undef CONFIG_CMD_SAVEENV
> +
> +#ifdef CONFIG_USB_DAVINCI
> +#define CONFIG_MUSB_HCD
> +#define CONFIG_CMD_USB
> +#define CONFIG_USB_STORAGE
> +#else
> +#undef CONFIG_MUSB_HCD
> +#undef CONFIG_CMD_USB
> +#undef CONFIG_USB_STORAGE
> +#endif
> +
> +#define CONFIG_CRC32_VERIFY
> +#define CONFIG_MX_CYCLIC
> +
> +/* U-Boot general configuration */
> +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
> +#define CONFIG_BOOTFILE "uImage" /* Boot file name */
> +#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
> +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
> +#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
> + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
> +#define CONFIG_SYS_HUSH_PARSER
> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> +#define CONFIG_SYS_LONGHELP
> +
> +#define CONFIG_ENV_SIZE SZ_16K
> +
> +/*#define CONFIG_BOOTDELAY 5 */
please remove if no need
> +#define CONFIG_BOOTCOMMAND \
> + "dhcp;bootm"
> +#define CONFIG_BOOTARGS \
> + "console=ttyS0,115200n8 " \
> + "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
> +
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_VERSION_VARIABLE
> +#define CONFIG_TIMESTAMP
> +
Best Regards,
J.
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