[U-Boot] [PATCH 10/10] imx27lite: add support for imx27lite board from LogicPD
Paul Thomas
pthomas8589 at gmail.com
Tue May 19 18:17:08 CEST 2009
On Wed, May 6, 2009 at 11:30 AM, Ilya Yanok <yanok at emcraft.com> wrote:
> This patch adds support for i.MX27-LITEKIT development board from
> LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
> flash, FEC ethernet controller integrated into i.MX27.
>
> Signed-off-by: Ilya Yanok <yanok at emcraft.com>
> ---
> MAKEALL | 1 +
> Makefile | 3 +
> board/logicpd/imx27lite/Makefile | 51 +++++++
> board/logicpd/imx27lite/config.mk | 1 +
> board/logicpd/imx27lite/imx27lite.c | 97 +++++++++++++
> board/logicpd/imx27lite/lowlevel_init.S | 225
> +++++++++++++++++++++++++++++++
> board/logicpd/imx27lite/u-boot.lds | 56 ++++++++
> include/configs/imx27lite.h | 188 ++++++++++++++++++++++++++
> 8 files changed, 622 insertions(+), 0 deletions(-)
> create mode 100644 board/logicpd/imx27lite/Makefile
> create mode 100644 board/logicpd/imx27lite/config.mk
> create mode 100644 board/logicpd/imx27lite/imx27lite.c
> create mode 100644 board/logicpd/imx27lite/lowlevel_init.S
> create mode 100644 board/logicpd/imx27lite/u-boot.lds
> create mode 100644 include/configs/imx27lite.h
>
> diff --git a/MAKEALL b/MAKEALL
> index f13c81a..4806512 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -504,6 +504,7 @@ LIST_ARM9=" \
> cp946es \
> cp966 \
> lpd7a400 \
> + imx27lite \
> mx1ads \
> mx1fs2 \
> netstar \
> diff --git a/Makefile b/Makefile
> index 137c88f..0c52bfa 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2790,6 +2790,9 @@ davinci_sffsdr_config : unconfig
> davinci_sonata_config : unconfig
> @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
>
> +imx27lite_config: unconfig
> + @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
> +
> lpd7a400_config \
> lpd7a404_config: unconfig
> @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
> diff --git a/board/logicpd/imx27lite/Makefile
> b/board/logicpd/imx27lite/Makefile
> new file mode 100644
> index 0000000..c404cef
> --- /dev/null
> +++ b/board/logicpd/imx27lite/Makefile
> @@ -0,0 +1,51 @@
> +#
> +# (C) Copyright 2000-2004
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).a
> +
> +COBJS := imx27lite.o
> +SOBJS := lowlevel_init.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean: clean
> + rm -f $(LIB) core *.bak $(obj).depend
> +
> +#########################################################################
> +
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> +
> diff --git a/board/logicpd/imx27lite/config.mk b/board/logicpd/imx27lite/
> config.mk
> new file mode 100644
> index 0000000..a2e7768
> --- /dev/null
> +++ b/board/logicpd/imx27lite/config.mk
> @@ -0,0 +1 @@
> +TEXT_BASE = 0xA7F00000
> diff --git a/board/logicpd/imx27lite/imx27lite.c
> b/board/logicpd/imx27lite/imx27lite.c
> new file mode 100644
> index 0000000..7c2658c
> --- /dev/null
> +++ b/board/logicpd/imx27lite/imx27lite.c
> @@ -0,0 +1,97 @@
> +/*
> + * Copyright (C) 2007 Sascha Hauer, Pengutronix
> + * Copyright (C) 2008,2009 Eric Jarrige <jorasse at users.sourceforge.net>
> + * Copyright (C) 2009 Ilya Yanok <yanok at emcraft.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <common.h>
> +#include <asm/arch/imx-regs.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static int imx27lite_devices_init(void)
> +{
> + int i;
> + unsigned int mode[] = {
> + PD0_AIN_FEC_TXD0,
> + PD1_AIN_FEC_TXD1,
> + PD2_AIN_FEC_TXD2,
> + PD3_AIN_FEC_TXD3,
> + PD4_AOUT_FEC_RX_ER,
> + PD5_AOUT_FEC_RXD1,
> + PD6_AOUT_FEC_RXD2,
> + PD7_AOUT_FEC_RXD3,
> + PD8_AF_FEC_MDIO,
> + PD9_AIN_FEC_MDC | GPIO_PUEN,
> + PD10_AOUT_FEC_CRS,
> + PD11_AOUT_FEC_TX_CLK,
> + PD12_AOUT_FEC_RXD0,
> + PD13_AOUT_FEC_RX_DV,
> + PD14_AOUT_FEC_CLR,
> + PD15_AOUT_FEC_COL,
> + PD16_AIN_FEC_TX_ER,
> + PF23_AIN_FEC_TX_EN,
> + PE12_PF_UART1_TXD,
> + PE13_PF_UART1_RXD,
> + PB4_PF_SD2_D0,
> + PB5_PF_SD2_D1,
> + PB6_PF_SD2_D2,
> + PB7_PF_SD2_D3,
> + PB8_PF_SD2_CMD,
> + PB9_PF_SD2_CLK,
> + };
> +
> + for (i = 0; i < ARRAY_SIZE(mode); i++)
> + imx_gpio_mode(mode[i]);
> +
> + return 0;
> +}
> +
> +int board_init (void)
> +{
> + gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE;
> + gd->bd->bi_boot_params = 0xa0000100;
> +
> + imx27lite_devices_init();
> +
> + return 0;
> +}
> +
> +int dram_init (void)
> +{
> +
> +#if ( CONFIG_NR_DRAM_BANKS > 0 )
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = get_ram_size((volatile void
> *)PHYS_SDRAM_1,
> + PHYS_SDRAM_1_SIZE);
> +#endif
> +#if ( CONFIG_NR_DRAM_BANKS > 1 )
> + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> + gd->bd->bi_dram[1].size = get_ram_size((volatile void
> *)PHYS_SDRAM_2,
> + PHYS_SDRAM_2_SIZE);
> +#endif
> +
> + return 0;
> +}
> +
> +int checkboard(void)
> +{
> + printf("LogicPD imx27lite\n");
> + return 0;
> +}
> diff --git a/board/logicpd/imx27lite/lowlevel_init.S
> b/board/logicpd/imx27lite/lowlevel_init.S
> new file mode 100644
> index 0000000..48c7fe6
> --- /dev/null
> +++ b/board/logicpd/imx27lite/lowlevel_init.S
> @@ -0,0 +1,225 @@
> +/*
> + * For clock initialization, see chapter 3 of the "MCIMX27 Multimedia
> + * Applications Processor Reference Manual, Rev. 0.2".
> + *
> + * (C) Copyright 2008 Eric Jarrige <eric.jarrige at armadeus.org>
> + * (C) Copyright 2009 Ilya Yanok <yanok at emcraft.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +
> +#include <config.h>
> +#include <version.h>
> +#include <asm/arch/imx-regs.h>
> +
> +#define CFG_SDRAM_ESDCFG_REGISTER_VAL(cas) \
> + (ESDCFG_TRC(10) | \
> + ESDCFG_TRCD(3) | \
> + ESDCFG_TCAS(cas) | \
> + ESDCFG_TRRD(1) | \
> + ESDCFG_TRAS(5) | \
> + ESDCFG_TWR | \
> + ESDCFG_TMRD(2) | \
> + ESDCFG_TRP(2) | \
> + ESDCFG_TXP(3))
> +
> +#define CFG_SDRAM_ESDCTL_REGISTER_VAL \
> + (ESDCTL_PRCT(0) | \
> + ESDCTL_BL | \
> + ESDCTL_PWDT(0) | \
> + ESDCTL_SREFR(3) | \
> + ESDCTL_DSIZ_32 | \
> + ESDCTL_COL10 | \
> + ESDCTL_ROW13 | \
> + ESDCTL_SDE)
> +
> +#define CFG_SDRAM_ALL_VAL 0xf00
> +
> +#define CFG_SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
> +#define CFG_SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
> +
> +#define CFG_MPCTL0_VAL 0x1ef15d5
> +
> +#define CFG_SPCTL0_VAL 0x043a1c09
> +
> +#define CFG_CSCR_VAL 0x33f08107
> +
> +#define CFG_PCDR0_VAL 0x120470c3
> +#define CFG_PCDR1_VAL 0x03030303
> +#define CFG_PCCR0_VAL 0xffffffff
> +#define CFG_PCCR1_VAL 0xfffffffc
> +
> +#define CFG_AIPI1_PSR0_VAL 0x20040304
> +#define CFG_AIPI1_PSR1_VAL 0xdffbfcfb
> +#define CFG_AIPI2_PSR0_VAL 0x07ffc200
> +#define CFG_AIPI2_PSR1_VAL 0xffffffff
> +
> +#define writel(reg, val) \
> + ldr r0, =reg; \
> + ldr r1, =val; \
> + str r1, [r0];
> +
> +SOC_ESDCTL_BASE_W: .word IMX_ESD_BASE
> +SOC_SI_ID_REG_W: .word IMX_SYSTEM_CTL_BASE
> +SDRAM_ESDCFG_T1_W: .word CFG_SDRAM_ESDCFG_REGISTER_VAL(0)
> +SDRAM_ESDCFG_T2_W: .word CFG_SDRAM_ESDCFG_REGISTER_VAL(3)
> +SDRAM_PRECHARGE_CMD_W: .word (ESDCTL_SDE | ESDCTL_SMODE_PRECHARGE | \
> + ESDCTL_ROW13 | ESDCTL_COL10)
> +SDRAM_AUTOREF_CMD_W: .word (ESDCTL_SDE | ESDCTL_SMODE_AUTO_REF | \
> + ESDCTL_ROW13 | ESDCTL_COL10)
> +SDRAM_LOADMODE_CMD_W: .word (ESDCTL_SDE | ESDCTL_SMODE_LOAD_MODE | \
> + ESDCTL_ROW13 | ESDCTL_COL10)
> +SDRAM_NORMAL_CMD_W: .word CFG_SDRAM_ESDCTL_REGISTER_VAL
> +
> + .macro init_aipi
> + /*
> + * setup AIPI1 and AIPI2
> + */
> + writel(AIPI1_PSR0, CFG_AIPI1_PSR0_VAL)
> + writel(AIPI1_PSR1, CFG_AIPI1_PSR1_VAL)
> + writel(AIPI2_PSR0, CFG_AIPI2_PSR0_VAL)
> + writel(AIPI2_PSR1, CFG_AIPI2_PSR1_VAL)
> +
> + .endm /* init_aipi */
> +
> + .macro init_clock
> + ldr r0, =CSCR
> + /* disable MPLL/SPLL first */
> + ldr r1, [r0]
> + bic r1, r1, #(CSCR_MPEN|CSCR_SPEN)
> + str r1, [r0]
> +
> + /*
> + * pll clock initialization predefined in apf27.h
> + */
> + writel(MPCTL0, CFG_MPCTL0_VAL)
> + writel(SPCTL0, CFG_SPCTL0_VAL)
> +
> + writel(CSCR, CFG_CSCR_VAL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART)
> +
> + /*
> + * add some delay here
> + */
> + mov r1, #0x1000
> +1: subs r1, r1, #0x1
> + bne 1b
> +
> + /* peripheral clock divider */
> + writel(PCDR0, CFG_PCDR0_VAL)
> + writel(PCDR1, CFG_PCDR1_VAL)
> +
> + /* Configure PCCR0 and PCCR1 */
> + writel(PCCR0, CFG_PCCR0_VAL)
> + writel(PCCR1, CFG_PCCR1_VAL)
> +
> + .endm /* init_clock */
> +
> + .macro sdram_init
> + ldr r0, SOC_ESDCTL_BASE_W
> + mov r2, #PHYS_SDRAM_1
> +
> + /* Do initial reset */
> + mov r1, #ESDMISC_MDDR_DL_RST
> + str r1, [r0, #ESDMISC_ROF]
> +
> + /* Hold for more than 200ns */
> + ldr r1, =0x10000
> +1:
> + subs r1, r1, #0x1
> + bne 1b
> +
> + /* Activate LPDDR iface */
> + mov r1, #ESDMISC_MDDREN
> + str r1, [r0, #ESDMISC_ROF]
> +
> + /* Check The chip version TO1 or TO2 */
> + ldr r1, SOC_SI_ID_REG_W
> + ldr r1, [r1]
> + ands r1, r1, #0xF0000000
> + /* add Latency on CAS only for TO2 */
> + ldreq r1, SDRAM_ESDCFG_T2_W
> + ldrne r1, SDRAM_ESDCFG_T1_W
> + str r1, [r0, #ESDCFG0_ROF]
> +
> + /* Run initialization sequence */
> + ldr r1, SDRAM_PRECHARGE_CMD_W
> + str r1, [r0, #ESDCTL0_ROF]
> + ldr r1, [r2, #CFG_SDRAM_ALL_VAL]
> +
> + ldr r1, SDRAM_AUTOREF_CMD_W
> + str r1, [r0, #ESDCTL0_ROF]
> + ldr r1, [r2, #CFG_SDRAM_ALL_VAL]
> + ldr r1, [r2, #CFG_SDRAM_ALL_VAL]
> +
> + ldr r1, SDRAM_LOADMODE_CMD_W
> + str r1, [r0, #ESDCTL0_ROF]
> + ldrb r1, [r2, #CFG_SDRAM_MODE_REGISTER_VAL]
> + add r3, r2, #CFG_SDRAM_EXT_MODE_REGISTER_VAL
> + ldrb r1, [r3]
> +
> + ldr r1, SDRAM_NORMAL_CMD_W
> + str r1, [r0, #ESDCTL0_ROF]
> +
> +#if (CONFIG_NR_DRAM_BANKS > 1)
> + /* 2nd sdram */
> + mov r2, #PHYS_SDRAM_2
> +
> + /* Check The chip version TO1 or TO2 */
> + ldr r1, SOC_SI_ID_REG_W
> + ldr r1, [r1]
> + ands r1, r1, #0xF0000000
> + /* add Latency on CAS only for TO2 */
> + ldreq r1, SDRAM_ESDCFG_T2_W
> + ldrne r1, SDRAM_ESDCFG_T1_W
> + str r1, [r0, #ESDCFG1_ROF]
> +
> + /* Run initialization sequence */
> + ldr r1, SDRAM_PRECHARGE_CMD_W
> + str r1, [r0, #ESDCTL1_ROF]
> + ldr r1, [r2, #CFG_SDRAM_ALL_VAL]
> +
> + ldr r1, SDRAM_AUTOREF_CMD_W
> + str r1, [r0, #ESDCTL1_ROF]
> + ldr r1, [r2, #CFG_SDRAM_ALL_VAL]
> + ldr r1, [r2, #CFG_SDRAM_ALL_VAL]
> +
> + ldr r1, SDRAM_LOADMODE_CMD_W
> + str r1, [r0, #ESDCTL1_ROF]
> + ldrb r1, [r2, #CFG_SDRAM_MODE_REGISTER_VAL]
> + add r3, r2, #CFG_SDRAM_EXT_MODE_REGISTER_VAL
> + ldrb r1, [r3]
> +
> + ldr r1, SDRAM_NORMAL_CMD_W
> + str r1, [r0, #ESDCTL1_ROF]
> +#endif /* CONFIG_NR_DRAM_BANKS > 1 */
> +
> + .endm /* sdram_init */
> +
> + .globl board_init_lowlevel
> + board_init_lowlevel:
> + .globl lowlevel_init
> + lowlevel_init:
> +
> + mov r10, lr
> +
> + init_aipi
> +
> + init_clock
> +
> + sdram_init
> +
> + mov pc,r10
> diff --git a/board/logicpd/imx27lite/u-boot.lds
> b/board/logicpd/imx27lite/u-boot.lds
> new file mode 100644
> index 0000000..f66f20e
> --- /dev/null
> +++ b/board/logicpd/imx27lite/u-boot.lds
> @@ -0,0 +1,56 @@
> +/*
> + * (C) Copyright 2007
> + * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(_start)
> +SECTIONS
> +{
> + . = 0x00000000;
> +
> + . = ALIGN(4);
> + .text :
> + {
> + cpu/arm926ejs/start.o (.text)
> + *(.text)
> + }
> +
> + . = ALIGN(4);
> + .rodata : { *(.rodata) }
> +
> + . = ALIGN(4);
> + .data : { *(.data) }
> +
> + . = ALIGN(4);
> + .got : { *(.got) }
> +
> + __u_boot_cmd_start = .;
> + .u_boot_cmd : { *(.u_boot_cmd) }
> + __u_boot_cmd_end = .;
> +
> + . = ALIGN(4);
> + __bss_start = .;
> + .bss : { *(.bss) }
> + _end = .;
> +}
> +
> diff --git a/include/configs/imx27lite.h b/include/configs/imx27lite.h
> new file mode 100644
> index 0000000..80fb291
> --- /dev/null
> +++ b/include/configs/imx27lite.h
> @@ -0,0 +1,188 @@
> +/*
> + * Copyright (C) 2009 Ilya Yanok <yanok at emcraft.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*===================*/
> +/* SoC Configuration */
> +/*===================*/
> +#define CONFIG_ARM926EJS /* arm926ejs CPU core */
> +#define CONFIG_MX27
> +#define CONFIG_IMX27LITE
> +#define CONFIG_MX31_CLK32 32768 /* OSC32K frequency */
> +#define CONFIG_SYS_HZ 1000
> +
> +#define CONFIG_DISPLAY_CPUINFO
> +
> +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs
> */
> +#define CONFIG_SETUP_MEMORY_TAGS 1
> +#define CONFIG_INITRD_TAG 1
> +
> +/*=============*/
> +/* Memory Info */
> +/*=============*/
> +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc()
> len */
> +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for
> initial data */
> +#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest start
> address */
> +#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
> +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM
> */
> +#define CONFIG_STACKSIZE (256*1024) /* regular stack */
> +#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
> +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
> +/*====================*/
> +/* Serial Driver info */
> +/*====================*/
> +#define CONFIG_MX31_UART
> +#define CONFIG_SYS_MX27_UART1
> +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
> +#define CONFIG_BAUDRATE 115200 /* Default baud
> rate */
> +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200
> }
> +/*=====================*/
> +/* Flash & Environment */
> +/*=====================*/
> +#define CONFIG_ENV_IS_IN_FLASH
> +#define CONFIG_FLASH_CFI_DRIVER
> +#define CONFIG_SYS_FLASH_CFI
> +/* Use buffered writes (~10x faster) */
> +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
> +/* Use hardware sector protection */
> +#define CONFIG_SYS_FLASH_PROTECTION 1
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of
> flash banks */
> +#define CONFIG_SYS_FLASH_SECT_SZ 0x2000 /* 8KB sect size
> Intel Flash */
> +#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - 0x20000) /*
> end of flash */
> +#define PHYS_FLASH_1 0xc0000000 /* CS2 Base address
> */
> +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for
> U-Boot */
> +#define PHYS_FLASH_SIZE 0x200000 /* Flash
> size 2MB */
> +#define CONFIG_SYS_MAX_FLASH_SECT
> (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
> +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
> +#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB
> */
> +#define CONFIG_ENV_SECT_SIZE 0x10000 /* Env sector Size
> */
> +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
> +/* Address and size of Redundant Environment Sector */
> +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET +
> CONFIG_ENV_SIZE)
> +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
> +/*
> + * Ethernet
> + */
> +#define CONFIG_FEC_IMX27
> +#define CONFIG_MII
> +/*
> + * NAND
> + */
> +#define CONFIG_NAND_MXC
> +#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_BASE 0xd8000000
> +/*
> + * SD/MMC
> + */
> +#define CONFIG_MMC
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_MXC_MMC
> +#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
> +#define CONFIG_DOS_PARTITION
> +/*
> + * JFFS2 partitions
> + */
> +#define CONFIG_CMD_MTDPARTS
> +#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=mxc_nand.0"
> +#define MTDPARTS_DEFAULT \
> + "mtdparts=physmap-flash.0:256k(U-Boot),1664k(user),64k(env1)," \
> + "64k(env2);mxc_nand.0:-(nand)"
> +
> +/*==============================*/
> +/* U-Boot general configuration */
> +/*==============================*/
> +#define CONFIG_BOOTFILE "uImage" /* Boot file name
> */
> +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
> +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
> +/* Print buffer sz */
> +#define CONFIG_SYS_PBSIZE
> (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
> +#define CONFIG_SYS_MAXARGS 16 /* max number of command
> args */
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument
> Buffer Size */
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_SYS_LONGHELP
> +/*=================*/
> +/* U-Boot commands */
> +/*=================*/
> +#include <config_cmd_default.h>
> +#define CONFIG_CMD_ASKENV
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_DIAG
> +#define CONFIG_CMD_NET
> +#undef CONFIG_CMD_NFS
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_PING
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_SETGETDCR
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_JFFS2
> +#define CONFIG_CMD_MMC
> +#define CONFIG_CMD_FAT
> +
> +/*
> + * You can compile in a MAC address and your custom net settings by using
> + * the following syntax.
> + *
> + * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx
> + * #define CONFIG_SERVERIP <server ip>
> + * #define CONFIG_IPADDR <board ip>
> + * #define CONFIG_GATEWAYIP <gateway ip>
> + * #define CONFIG_NETMASK <your netmask>
> + */
> +
> +#define CONFIG_BOOTDELAY 5
> +
> +#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var
> */
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +
> +#define xstr(s) str(s)
> +#define str(s) #s
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS
> \
> + "netdev=eth0\0" \
> + "nfsargs=setenv bootargs root=/dev/nfs rw " \
> + "nfsroot=${serverip}:${rootpath}\0" \
> + "ramargs=setenv bootargs root=/dev/ram rw\0" \
> + "addip=setenv bootargs ${bootargs} " \
> + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
> + ":${hostname}:${netdev}:off panic=1\0" \
> + "addtty=setenv bootargs ${bootargs}" \
> + " console=ttymxc0,${baudrate}\0" \
> + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
> + "addmisc=setenv bootargs ${bootargs}\0" \
> + "u-boot=imx27/u-boot.bin\0" \
> + "kernel_addr_r=a0800000\0" \
> + "hostname=imx27\0" \
> + "bootfile=imx27/uImage\0" \
> + "rootpath=/opt/eldk-4.2-arm/arm\0" \
> + "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
> + "run nfsargs addip addtty addmtd addmisc;" \
> + "bootm\0" \
> + "bootcmd=run net_nfs\0" \
> + "load=tftp ${loadaddr} ${u-boot}\0" \
> + "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
> + " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
> + " +${filesize};cp.b ${fileaddr} " \
> + xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
> + "upd=run load update\0" \
> +
> +#endif /* __CONFIG_H */
> --
> 1.6.0.6
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
Hello,
I was trying to test out this patch, and I'm having some trouble. I did a
git pull on the u-boot tree, and then I saved this patch to a text file. I
was able to apply the patch just fine. The first thing that happend was make
didn't like the Makefile, but I think it was just a space problem because
after I edited the Makefile to match the entries around imx27lite_config it
worked OK. Now when I run make it gives the error:
make[1]: Leaving directory `/home/raid5/imx27env/u-boot/cpu/arm926ejs'
make -C cpu/arm926ejs/mx27/
make: *** cpu/arm926ejs/mx27/: No such file or directory. Stop.
make: *** [cpu/arm926ejs/mx27/libmx27.a] Error 2
How do I know what git version to use the patch against? If I were using
git-am instead of just saving it to a file would that be different? Is there
another patch I need?
thanks,
Paul
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