[U-Boot] [PATCH] change cpu.c under cpu/arm_cortexa8 dir to common code.

[Kim, Heung Jun]

First of all, thanks for reading this to Dirk, Jean-Christophe.

>> Anyway, yes, from functionality point of view I agree this patch. OMAP3 was the first Cortex A8 device. So it was more or less expected that while adding additional ones we have to re-arrange some stuff. Being the first adding new stuff, you can't really know what might be generic and what not ;)
Dirk? Definitely, Yes :)
Actually, we wanna make new codes for Cortex A8 CPU - the name of s5pc100,
and send the new patch of it.
But, while making the new specific code about s5pc100,
we found cpu/arm_cortexa8/cpu.c has the dependent function l2cache_enable() /
l2cache_diable() / cache_flush() on omap3 i guess.
Although s5pc100 specific code dosen't use this dependent code,
compile error occured cause of get_device_type().

So, we had to send patch file about removing dependency cpu core first.

After this issue was resolved, I'll plan to send the s5pc100 core patch.


2009/5/28 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>:
>> The only thing I'd like to discuss is how to name the functions. Naming
>> the functions board_*() doesn't seem to fit. Cache functionality isn't
>> really board related. Regarding L2Cache, this is CPU/SoC related. So
>> maybe omap3_l2cache_*()?
> actually I'd like to have a better cache management API and you point the
> board_ does not fit here as the code is soc or arch specific
>>
>> Regarding cache_flush()/board_cache_flush() below maybe Jean-Christophe
>> can help if we have already something generic for this somewhere? If not,
>> we should use something like omap3_cache_flush().
> as we will support only one arch simultany I'll prefer to not specify it's
> name at all.
>
> you will ask why? The reason is that I do want have a common cache management
> and a common cleanup before linux
>
> so I'll propose l2_cache_flush as done for the Marvell orion
>
> for non-l2 cache I prefer to manage it via armvXX as they will be common
Jean? Ok. I agree with that. So, what name do we use?
For example, can we make the function name of l2_cache_enable() into
any other files
under the directory of cpu/arm_cortex/sp5c100/ ??

Our goal is making the s5pc100 core patch, and reflecting(?) it on the
u-boot mainline.
If the exact common function name is decided, we are able to do the
new patch works.
I'd like to get the name of cache common funcion, plz :)


Best Regards,
HeungJun Kim(riverful).