[U-Boot] [PATCH 1/7] mx27: basic cpu support

[Wolfgang Denk]

Dear Ilya Yanok,

In message <1242777361-6717-2-git-send-email-yanok at emcraft.com> you wrote:
> This patch adds generic code to support Freescale's i.MX27 SoCs.
> 
> Signed-off-by: Ilya Yanok <yanok at emcraft.com>
> ---
>  cpu/arm926ejs/mx27/Makefile             |   44 +++
>  cpu/arm926ejs/mx27/generic.c            |  237 ++++++++++++++
>  cpu/arm926ejs/mx27/interrupt.c          |  201 ++++++++++++
>  include/asm-arm/arch-mx27/asm-offsets.h |   16 +
>  include/asm-arm/arch-mx27/clock.h       |   17 +
>  include/asm-arm/arch-mx27/imx-regs.h    |  508 +++++++++++++++++++++++++++++++
>  6 files changed, 1023 insertions(+), 0 deletions(-)
>  create mode 100644 cpu/arm926ejs/mx27/Makefile
>  create mode 100644 cpu/arm926ejs/mx27/generic.c
>  create mode 100644 cpu/arm926ejs/mx27/interrupt.c
>  create mode 100644 include/asm-arm/arch-mx27/asm-offsets.h
>  create mode 100644 include/asm-arm/arch-mx27/clock.h
>  create mode 100644 include/asm-arm/arch-mx27/imx-regs.h
...

> +/* System Control */
> +struct system_control_regs {
> +	u32 res[5];
> +	u32 FMCR;
> +	u32 GPCR;
> +	u32 WBCR;
> +	u32 DSCR1;
> +	u32 DSCR2;
> +	u32 DSCR3;
> +	u32 DSCR4;
> +	u32 DSCR5;
> +	u32 DSCR6;
> +	u32 DSCR7;
> +	u32 DSCR8;
> +	u32 DSCR9;
> +	u32 DSCR10;
> +	u32 DSCR11;
> +	u32 DSCR12;
> +	u32 DSCR13;
> +	u32 PSCR;
> +	u32 PMCR;
> +	u32 res1;
> +	u32 DCVR0;
> +	u32 DCVR1;
> +	u32 DCVR2;
> +	u32 DCVR3;
> +};
> +
> +/* Chip Select Registers */
> +struct weim_regs {
> +	u32 CS0U;	/* Chip Select 0 Upper Register    */
> +	u32 CS0L;	/* Chip Select 0 Lower Register    */
> +	u32 CS0A;	/* Chip Select 0 Addition Register */
> +	u32 pad0;
> +	u32 CS1U;	/* Chip Select 1 Upper Register    */
> +	u32 CS1L;	/* Chip Select 1 Lower Register    */
> +	u32 CS1A;	/* Chip Select 1 Addition Register */
> +	u32 pad1;
> +	u32 CS2U;	/* Chip Select 2 Upper Register    */
> +	u32 CS2L;	/* Chip Select 2 Lower Register    */
> +	u32 CS2A;	/* Chip Select 2 Addition Register */
> +	u32 pad2;
> +	u32 CS3U;	/* Chip Select 3 Upper Register    */
> +	u32 CS3L;	/* Chip Select 3 Lower Register    */
> +	u32 CS3A;	/* Chip Select 3 Addition Register */
> +	u32 pad3;
> +	u32 CS4U;	/* Chip Select 4 Upper Register    */
> +	u32 CS4L;	/* Chip Select 4 Lower Register    */
> +	u32 CS4A;	/* Chip Select 4 Addition Register */
> +	u32 pad4;
> +	u32 CS5U;	/* Chip Select 5 Upper Register    */
> +	u32 CS5L;	/* Chip Select 5 Lower Register    */
> +	u32 CS5A;	/* Chip Select 5 Addition Register */
> +	u32 pad5;
> +	u32 EIM;	/* WEIM Configuration Register     */
> +};

here and everywhere in the code: identifiers are lower case only.
Upper case is reserved for macros only.

Best regards,

Wolfgang Denk

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