[U-Boot] AT91 Rework
Jens Scharsig
js_at_ng at scharsoft.de
Wed Nov 4 21:58:16 CET 2009
Dear Wolfgang Denk,
what you are mean to the following code snippet
it decrpipts then AT91 timercontroller and lot of TC configuration bits
I am on the right way?
Best regards
Jens Scharsig
...
typedef struct at91_tcc {
ulong ccr; /* 0x00 Channel Control Register */
ulong cmr; /* 0x04 Channel Mode Register */
ulong reserved1[2];
ulong cv; /* 0x10 Counter Value */
ulong ra; /* 0x14 Register A */
ulong rb; /* 0x18 Register B */
ulong rc; /* 0x1C Register C */
ulong sr; /* 0x20 Status Register */
ulong ier; /* 0x24 Interrupt Enable Register */
ulong idr; /* 0x28 Interrupt Disable Register */
ulong imr; /* 0x2C Interrupt Mask Register */
ulong reserved3[4];
} at91_tcc_t;
#define AT91_TC_CCR_CLKEN ((ulong) 0x00000001)
#define AT91_TC_CCR_CLKDIS ((ulong) 0x00000002)
#define AT91_TC_CCR_SWTRG ((ulong) 0x00000004)
...
typedef struct at91_tc {
at91_tcc_t tc[3]; /* 0x00 TC Channel 0-2 */
ulong bcr; /* 0xC0 TC Block Control Register */
ulong bmr; /* 0xC4 TC Block Mode Register */
} at91_tc_t;
...
#define AT91_TC_BMR_TC0XC0S_TCLK0 ((ulong) 0x00000000)
#define AT91_TC_BMR_TC0XC0S_NONE ((ulong) 0x00000001)
#define AT91_TC_BMR_TC0XC0S_TIOA1 ((ulong) 0x00000002)
#define AT91_TC_BMR_TC0XC0S_TIOA2 ((ulong) 0x00000003)
#define AT91_TC_BMR_TC1XC1S_TCLK1 ((ulong) 0x00000000)
#define AT91_TC_BMR_TC1XC1S_NONE ((ulong) 0x00000004)
#define AT91_TC_BMR_TC1XC1S_TIOA0 ((ulong) 0x00000008)
#define AT91_TC_BMR_TC1XC1S_TIOA2 ((ulong) 0x0000000C)
#define AT91_TC_BMR_TC2XC0S_TCLK2 ((ulong) 0x00000000)
#define AT91_TC_BMR_TC2XC0S_NONE ((ulong) 0x00000010)
#define AT91_TC_BMR_TC2XC0S_TIOA0 ((ulong) 0x00000020)
#define AT91_TC_BMR_TC2XC0S_TIOA1 ((ulong) 0x00000030)
...
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