[U-Boot] [PATCH] Fix the local bus divider mapping

Dave Liu daveliu at freescale.com
Tue Nov 17 13:49:05 CET 2009


The real clock divider is 4 times of the bits LCRR[CLKDIV],
according the latest RevF RM.

Signed-off-by: Dave Liu <daveliu at freescale.com>
---
 cpu/mpc85xx/speed.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 7959082..89ecc87 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -170,7 +170,12 @@ void get_sys_info (sys_info_t * sysInfo)
 	}
 #endif
 	if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
-#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
+#if defined(CONFIG_FSL_CORENET)
+		/* If this is corenet based SoC, bit-representation
+		 * for four times the clock divider values.
+		 */
+		lcrr_div *= 4;
+#elif !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
     !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
 		/*
 		 * Yes, the entire PQ38 family use the same
-- 
1.5.6



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