[U-Boot] Virtual addresses, u-boot, and the MMU

[Andrew Dyer]

On Thu, Sep 3, 2009 at 11:09 AM, Becky Bruce<becky.bruce at freescale.com> wrote:
> This makes sense to me.  The disable function would need to flush the
> range from the cache, but that's the only difficulty I forsee.
> However, I dug up some AVR32 docs, and it looks like the whole dual
> cacheable/CI mapping thing may be architectural.  The architecture
> seems to specify a virtual memory map for privileged state, and part
> of the VA range is not translated by the MMU, but has a default
> translation.  There appear to be segments in the untranslated VA space
> that map to the same PA, one cacheable and the other not.

MIPS32 uses essentially the same setup, in kernel mode (where u-boot
runs), there is 1/2 the virtual address space that is mapped through
the TLB and cacheability is a page attribute, the other 1/2 contains 4
fixed regions with different combinations of cache policy and whether
they are mapped via TLB or static mapping.  IIRC, MIPS64 adds a few
small wrinkles, but is pretty much the same idea.

The unmapped cached and unmapped uncached regions always map to the
same physical address and are the only segments typically used for
u-boot.  I have used the mapped segments on a machine with 32 bit VA
and 36 bit PA to map a peripheral that wasn't accessable in the fixed
mapped segments, but that was a bit of an odd case.