[U-Boot] [PATCH] arm_cortexa8: support cache flush to other soc

[Kyungmin Park]

On Fri, Sep 4, 2009 at 8:06 PM, Wolfgang Denk<wd at denx.de> wrote:
> Dear Kyungmin Park,
>
> In message <9c9fda240909040234m4fdd7466ybb38d0d0618cdf32 at mail.gmail.com> you wrote:
>>
> ...
>> >>  #ifndef CONFIG_L2_OFF
>> >> -     /* turn off L2 cache */
>> >> -     l2_cache_disable();
>> >> -     /* invalidate L2 cache also */
>> >> -     v7_flush_dcache_all(get_device_type());
>> >> -#endif
>> >> -     i = 0;
>> >> -     /* mem barrier to sync up things */
>> >> -     asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));
>> >> +     if (get_device_type() != 0xC100) {
>> >
>> > Hmm, what is this "0xC100" ?
>>
>> Now we got two cpu, s5pc100 and s5pc110. In case of s5pc100 we don't
>> need to turn off l2 cache. but s5pc110 needs it.
>> So first check the device type, actually cpu type. then determine turn
>> off l2 cache or not.
>
> Well, this definitely needs a comment, doesn;t it?
>
> And I really dislike such board-specific parts in common code. If what
> you want to check is the CPU type, then isn;t there a more direct way?
>
> And do we need a runtime check here? I think that decision can be made
> at compile time, right?

To support two different CPU. If it determined at compile time. we
can't support different CPUs

>
>
> ...
>> maybe not. now we only tested the smdkc100 but actual use is internal
>> board for s5pc100 & s5pc110.
>
> Do you use the very same U-Boot image on both SoCs?

Yes. One U-Boot image support 2 different CPU and 7 different boards.
We don't want to make a u-boot for each board.

Thank you,
Kyungmin Park