[U-Boot] Odd value for I2C_TIMEOUT in fsl_i2c.c

[Peter Tyser]

On Fri, 2009-09-04 at 10:30 -0500, Timur Tabi wrote:
> Peter Tyser wrote:
> > If this is the case, the timeout should be the maximum (or reasonable
> > maximum) time an I2C transaction could take.
> 
> How long is that?  Is one millisecond good enough?

The timeout in i2c_wait4bus() could potentially be pretty large.  The
I2C bus could in theory be ran at very slow speeds, 1 cycle could be
many bytes, etc.  You'd have to dig into the spec to get a definitive
answer about how long a maximum cycle is (if there is even a value), but
I think it would have to be much longer than 1ms.  Looks like the linux
driver has a timeout of 1 second (for the equivalent of i2c_wait4bus()).
I'd be fine with that for U-Boot too.  99% of boards don't have multiple
masters so a large timeout shouldn't affect them at all.

As far as the I2C_TIMEOUT in general I'm not sure either:)  1ms might be
OK, but for reference the SMBus has a specified timeout of minimum 25ms,
max 35ms.  I'd tend to lean towards the conservative side as for devices
that are working correctly, they will never timeout.  If i2c
transactions are timing out, I'd be more concerned about why than the
extra 2 seconds my board took to boot:)  I guess the i2c probe command
might take a while too, but that personally doesn't bother me.

In any case, I'd vote for a different, very large timeout value for
i2c_wait4bus() and a few millisecond (or larger) timeout for
I2C_TIMEOUT.

Best,
Peter