[U-Boot] invalid core multipliers?

Wolfgang Denk wd at denx.de
Fri Sep 4 22:57:14 CEST 2009


Dear =?ISO-8859-1?Q?K=E1ri_Dav=ED=F0sson?=,

In message <4A9D610A.3020206 at marel.com> you wrote:
> 
> I am bootstrapping an mpc5121e board.
> 
> When the cpu speed is calculated (cpu/mpc512x/speed.c) there is a comment about
> all core pll settings above 7 are invalid....
> 
> I can't see anything about that in the CPU documentation so I am wondering if
> anyone has reference to where this is defined as invalid.
> 
> The board I am using is using CORE PLL index 0x8, i.e. multiplier of 4.

I tried and checked some old versions of the UM and the old errata
sheets, but I didn't keep all the very early ones, and in the ones
left I didn't find it. Guess this might have been a restriction ofthe
very first silicon.

John, do you happen to remember any details?

> If this comment in the code is wrong then the following patch should be o.k...

Guess so, ut then why not fill up the table?

And please add your SoB line, too.

> Index: cpu/mpc512x/speed.c
> ===================================================================
> --- cpu/mpc512x/speed.c	(revision 635)
> +++ cpu/mpc512x/speed.c	(working copy)
> @@ -44,7 +44,7 @@
>   	{1, 1}, {3, 2},
>   	{2, 1}, {5, 2},
>   	{3, 1}, {7, 2},
> -	{0, 1}, {0, 1}, /* and all above 7 are not valid too */
> +	{4, 1}, {0, 1}, /* and all above 7 are not valid too.... I doubt this claim */
>   	{0, 1}, {0, 1},
>   	{0, 1}, {0, 1},
>   	{0, 1}, {0, 1}

Best regards,

Wolfgang Denk

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