[U-Boot] [PATCH] MCI support for AT91 family processors.

[Jean-Christophe PLAGNIOL-VILLARD]

> 
> diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c
> index 39e405f..2dc1984 100644
> --- a/cpu/arm926ejs/at91/at91cap9_devices.c
> +++ b/cpu/arm926ejs/at91/at91cap9_devices.c
> @@ -79,6 +79,42 @@ void at91_serial_hw_init(void)
>  #endif
>  }
>  
> +#ifdef CONFIG_ATMEL_MCI
> +#ifdef CONFIG_AT91_MCI0
> +void at91_mci0_hw_init(int slot)
> +{
> +	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI0);
please use correct SOC cloclk marco everywhere
> +	at91_set_A_periph(AT91_PIN_PA2, 0);
> +
> +	switch(slot) {
why switch slot?
you are already in mci0 and there is only one for the cap9
> +		case 0:
> +			at91_set_A_periph(AT91_PIN_PA0, 1);
> +			at91_set_A_periph(AT91_PIN_PA1, 1);
> +			at91_set_A_periph(AT91_PIN_PA3, 1);
> +			at91_set_A_periph(AT91_PIN_PA4, 1);
> +			at91_set_A_periph(AT91_PIN_PA5, 1);
you need to add an option to PA3,4,5 only in 4 wire mode
and it's will be also available for the other hw_init
> +			break;
> +	}
> +}
> +#elif defined(CONFIG_AT91_MCI1
miss a ')' and on some other
> +void at91_mci1_hw_init(int slot)
> +{
> +	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI);
> +	at91_set_A_periph(AT91_PIN_PA16, 0);
> +
> +	switch(slot) {
why switch slot?
you are already in mci1 and there is only one for the cap9
> +		case 0:
> +			at91_set_A_periph(AT91_PIN_PA17, 1);
> +			at91_set_A_periph(AT91_PIN_PA18, 1);
> +			at91_set_A_periph(AT91_PIN_PA19, 1);
> +			at91_set_A_periph(AT91_PIN_PA20, 1);
> +			at91_set_A_periph(AT91_PIN_PA21, 1);
> +			break;
> +	}
> +}
> +#endif
> +#endif
> +
> diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h
> index de06a10..6430ade 100644
> --- a/include/asm-arm/arch-at91/hardware.h
> +++ b/include/asm-arm/arch-at91/hardware.h
> @@ -20,6 +20,7 @@
>  #include <asm/arch/at91rm9200.h>
>  #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
>  #include <asm/arch/at91sam9260.h>
> +#define AT91_BASE_MCI	AT91SAM9260_BASE_MCI
please use MCI0_BASE and MCI1_BASE so we can detect if the soc support
multiple mci and please move it to soc header
I'll send a patch to clean the other
>  #define AT91_BASE_SPI	AT91SAM9260_BASE_SPI0
>  #define AT91_ID_UHP	AT91SAM9260_ID_UHP
>  #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP

Best Regards,
J.