[U-Boot] [PATCH] Add MII bus implementation for FCC ports (using bitbanging)
Scott Wood
scottwood at freescale.com
Mon Sep 21 19:33:50 CEST 2009
On Sat, Sep 19, 2009 at 05:39:37PM +0200, Luigi 'Comio' Mantellini wrote:
> +/*****************************************************************************
> + *
> + * Utility to send the preamble, address, and register (common to read
> + * and write).
> + */
> +static void mpc85xx_miiphy_pre (struct ether_fcc_info_s *info, char read, unsigned char addr, unsigned char reg)
> +{
> + int j; /* counter */
> +
> + int mdio = info->mdiopin;
> + int mdc = info->mdcpin;
> +
> + /*
> + * Send a 32 bit preamble ('1's) with an extra '1' bit for good measure.
> + * The IEEE spec says this is a PHY optional requirement. The AMD
> + * 79C874 requires one after power up and one after a MII communications
> + * error. This means that we are doing more preambles than we need,
> + * but it is safer and will be much more robust.
> + */
> +
> + mpc85xx_mdio_active(mdio);
> + mpc85xx_mdc_active(mdc);
> + mpc85xx_mdio_set(mdio, 1);
> +
> + for (j = 0; j < 32; j++) {
> + mpc85xx_mdc_set(mdc, 0);
> + mpc85xx_udelay(1);
> + mpc85xx_mdc_set(mdc, 1);
> + mpc85xx_udelay(1);
> + }
> +
> + /* send the start bit (01) and the read opcode (10) or write (10) */
> + mpc85xx_mdc_set(mdc, 0);
> + mpc85xx_mdio_set(mdio, 0);
> + mpc85xx_udelay(1);
> + mpc85xx_mdc_set(mdc, 1);
> + mpc85xx_udelay(1);
> + mpc85xx_mdc_set(mdc, 0);
> + mpc85xx_mdio_set(mdio, 1);
> + mpc85xx_udelay(1);
Please do not duplicate this. Use the existing code in
drivers/net/phy/miiphybb.c, refactoring it if necessary.
Also, please attribute and preserve copyrights when you copy large chunks
of code.
-Scott
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