[U-Boot] [PATCH v3 2/7] ppc/p4080: Add support for CoreNet style platform LAWs

[Wolfgang Denk]

Dear Kumar Gala,

In message <1253376008-13225-2-git-send-email-galak at kernel.crashing.org> you wrote:
> On CoreNet based platforms the LAW address is split between an high &
> low register and we no longer shift the address.  Also, the target IDs
> on CoreNet platforms have been completely re-assigned.
> 
> Additionally, added a new find_law() API to which LAW an address hits in.
> This is need for the CoreNet style boot release code since it will need
> to determine what the target ID should be set to for boot window
> translation.
> 
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
...
>  void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
>  {
> +#ifdef CONFIG_FSL_CORENET
> +	volatile ccsr_local_t *ccm = 
> +		(void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
> +
> +	gd->used_laws |= (1 << idx);
> +
> +	out_be32(&ccm->law[idx].lawar, 0);
> +	out_be32(&ccm->law[idx].lawbarh, ((u64)addr >> 32));
> +	out_be32(&ccm->law[idx].lawbarl, addr & 0xffffffff);
> +	out_be32(&ccm->law[idx].lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
> +
> +	/* Read back so that we sync the writes */
> +	in_be32(&ccm->law[idx].lawar);
> +#else
>  	volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
>  	volatile u32 *lawbar = base + 8 * idx;
>  	volatile u32 *lawar = base + 8 * idx + 2;

Now we have variable declarations after code (ok, #ifdef'ed code, but
anyway). Please don't do that.  Please check everywhere.

>  
...
> +struct law_entry find_law(phys_addr_t addr)
> +{
> +	struct law_entry entry;
> +	int i;
> +
> +	entry.index = -1;
> +	entry.addr = 0;
> +	entry.size = 0;
> +	entry.trgt_id = 0;
> +
> +	for(i = 0; i < FSL_HW_NUM_LAWS; i++) {
> +

Please add a space after the "for", and drop the empty line.


Best regards,

Wolfgang Denk

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