[U-Boot] [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields

[Kim Phillips]

On Sat, 26 Sep 2009 20:46:42 -0500
Kim Phillips <kim.phillips at freescale.com> wrote:

> On Sat, 26 Sep 2009 12:37:40 +0200
> Heiko Schocher <hs at denx.de> wrote:
> 
> > Kim Phillips wrote:
> > > -	/* LCRR - Clock Ratio Register (10.3.1.16) */
> > > -	im->lbus.lcrr = CONFIG_SYS_LCRR;
> > > +	/* LCRR - Clock Ratio Register (10.3.1.16)
> > > +	 * write, read, and isync per MPC8379ERM rev.1 CLKDEV field description
> > > +	 */
> > > +	clrsetbits_be32(&im->lbus.lcrr, lcrr_mask, lcrr_val);
> > > +	__raw_readl(&im->lbus.lcrr);
> > > +	isync();
> > 
> > Hmm.. shouldn;t this be done when running from RAM, as DaveLiu
> > suggested?
> 
> oh, I suppose so ;).  here's v2:

and now v3 (I had left a qe_base redefinition in v2):