[U-Boot] [PATCH v2] ppc/85xx: PIO Support for FSL eSDHC Controller Driver

[Bin Meng]

On Thu, Sep 10, 2009 at 9:37 PM, Dipen Dudhat
<dipen.dudhat at freescale.com> wrote:
> +                       while (size && (!(irqstat & IRQSTAT_TC))) {
> +                               udelay(100);
> +                               irqstat = in_be32(&regs->irqstat);
> +                               databuf = in_le32(&regs->datport);
> +                               *((uint *)buffer) = databuf;
> +                               buffer += 4;
> +                               size -= 4;
> +                       }

Is the udelay(100) the recommended delay time by the chip manual or
empirical value?
Can you add a comment before the udelay?

Regards,
Bin Meng