[U-Boot] [PATCH 4/6] adding uC5274/5275 dimm module support

David Wu davidwu at arcturusnetworks.com
Fri Apr 9 17:11:52 CEST 2010


Signed-off-by: David Wu <davidwu at arcturusnetworks.com>
---
    Makefile                         |   21 +++
    board/Arcturus/uC5275/Makefile   |   44 +++++++
    board/Arcturus/uC5275/config.mk  |   23 ++++
    board/Arcturus/uC5275/u-boot.lds |  139 ++++++++++++++++++++
    board/Arcturus/uC5275/uC5275.c   |  118 +++++++++++++++++
    include/configs/uC5275.h         |  263
++++++++++++++++++++++++++++++++++++++
    6 files changed, 608 insertions(+), 0 deletions(-)
    create mode 100644 board/Arcturus/uC5275/Makefile
    create mode 100644 board/Arcturus/uC5275/config.mk
    create mode 100644 board/Arcturus/uC5275/u-boot.lds
    create mode 100644 board/Arcturus/uC5275/uC5275.c
    create mode 100644 include/configs/uC5275.h

diff --git a/Makefile b/Makefile
index c9215d0..6dad806 100644
--- a/Makefile
+++ b/Makefile
@@ -2268,6 +2268,27 @@ uC5272-8EE32U66_config:		unconfig
    	fi ;
    	@$(MKCONFIG) -a uC5272 m68k mcf52x2 uC5272 Arcturus

+uC5274-16E322T150_config \
+uC5275-16EE32U150_config \
+uC5275-16EE32M150_config:	unconfig
+	@mkdir -p $(obj)include
+	@echo "#define PRODUCTION_STRING " \"$(@:_config=)\"
>> $(obj)include/config.h
+	@if [ "$(findstring 5274,$@)" ] ; then \
+		echo "#define CONFIG_M5274 " >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring EE,$@)" ] ; then \
+		echo "#define CONFIG_HAS_ETH1 " >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring 16E,$@)" ] ; then \
+		echo "#define __16MFlash__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_FLASH_SIZE 0x01000000"
>> $(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring E32,$@)" ] ; then \
+		echo "#define __32MRam__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_SDRAM_SIZE 32" >>$(obj)include/config.h ;\
+	fi ;
+	@$(MKCONFIG) -a uC5275 m68k mcf52x2 uC5275 Arcturus
+
    #########################################################################
    ## MPC83xx Systems
    #########################################################################
diff --git a/board/Arcturus/uC5275/Makefile
b/board/Arcturus/uC5275/Makefile
new file mode 100644
index 0000000..981763d
--- /dev/null
+++ b/board/Arcturus/uC5275/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Arcturus/uC5275/config.mk
b/board/Arcturus/uC5275/config.mk
new file mode 100644
index 0000000..4605e0e
--- /dev/null
+++ b/board/Arcturus/uC5275/config.mk
@@ -0,0 +1,23 @@
+#
+# (c) Copyright 2010 Arcturus Networks Inc.
+#     by David Wu <www.ArcturusNetworks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+TEXT_BASE = 0xf0000000
diff --git a/board/Arcturus/uC5275/u-boot.lds
b/board/Arcturus/uC5275/u-boot.lds
new file mode 100644
index 0000000..daf8724
--- /dev/null
+++ b/board/Arcturus/uC5275/u-boot.lds
@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)	}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)	}
+  .rela.got      : { *(.rela.got)	}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)	}
+  .rela.bss      : { *(.rela.bss)	}
+  .rel.plt       : { *(.rel.plt)	}
+  .rela.plt      : { *(.rela.plt)	}
+  .init          : { *(.init)		}
+  .plt           : { *(.plt)		}
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf52x2/start.o		(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/string.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/env_embedded.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+    .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/Arcturus/uC5275/uC5275.c
b/board/Arcturus/uC5275/uC5275.c
new file mode 100644
index 0000000..0dc168e
--- /dev/null
+++ b/board/Arcturus/uC5275/uC5275.c
@@ -0,0 +1,118 @@
+/*
+ * (c) Copyright 2010 Arcturus Networks Inc.
+ *     by David Wu <www.ArcturusNetworks.com>
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * Copyright (C) 2005-2008 Arthur Shipkowski (art at videon-central.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+
+#define CLKOUT	(150/2)	/* CLKOUT frequency ==  fsys/2, fsys == 150MHz */
+#define SDRAM_TREFI	7800	/* 7.8 us == 7800 ns */
+
+int checkboard(void)
+{
+	puts("Board: ");
+	puts(PRODUCT_FACTORY);
+	puts(PRODUCT_REVISION);
+	puts("\n");
+	return 0;
+};
+
+phys_size_t initdram(int board_type)
+{
+	volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM);
+	volatile gpio_t *gpio_reg = (gpio_t *) (MMAP_GPIO);
+
+	gpio_reg->par_sdram = 0x3FF;	/* Enable SDRAM */
+
+	/* Set up chip select */
+	sdp->sdbar0 = CONFIG_SYS_SDRAM_BASE;
+	sdp->sdbmr0 = CONFIG_SYS_SDRAM_SDMR0;
+
+	/* Set up timing */
+	sdp->sdcfg1 = 0x83711630;
+	sdp->sdcfg2 = 0x46B70000;
+
+	/* Enable clock */
+	sdp->sdcr = MCF_SDRAMC_SDCR_MODE_EN | MCF_SDRAMC_SDCR_CKE;
+
+	/* Set precharge */
+	sdp->sdcr |= MCF_SDRAMC_SDCR_IPALL;
+
+	/* Dummy write to start SDRAM */
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+
+	/* Send LEMR */
+	sdp->sdmr = MCF_SDRAMC_SDMR_BNKAD_LEMR | MCF_SDRAMC_SDMR_AD(0x0)
+	    | MCF_SDRAMC_SDMR_CMD;
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+
+	/* Send LMR */
+	sdp->sdmr = 0x058d0000;
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+
+	/* Delay locked loop (DLL) */
+	{
+		int i;
+		for (i = 0; i < 0x10000; i++)
+			asm("nop");
+	}
+	/* Stop sending commands */
+	sdp->sdmr &= ~(MCF_SDRAMC_SDMR_CMD);
+
+	/* Set precharge */
+	sdp->sdcr |= MCF_SDRAMC_SDCR_IPALL;
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+
+	/* Stop manual precharge, send 2 IREF */
+	sdp->sdcr &= ~(MCF_SDRAMC_SDCR_IPALL);
+	sdp->sdcr |= MCF_SDRAMC_SDCR_IREF;
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+
+	/* Write mode register, clear reset DLL */
+	sdp->sdmr = 0x018d0000;
+	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+
+	/* Stop sending commands */
+	sdp->sdmr &= ~(MCF_SDRAMC_SDMR_CMD);
+	sdp->sdcr &= ~(MCF_SDRAMC_SDCR_MODE_EN);
+
+	/* Turn on auto refresh, lock SDMR */
+	sdp->sdcr =
+	    MCF_SDRAMC_SDCR_CKE | MCF_SDRAMC_SDCR_REF | MCF_SDRAMC_SDCR_MUX(1)
+	    | MCF_SDRAMC_SDCR_RCNT(((CLKOUT * SDRAM_TREFI) / (1000 * 64)) - 1)
+	    | MCF_SDRAMC_SDCR_DQS_OE(0x3);
+
+	return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+};
+
+int testdram(void)
+{
+	printf("DRAM test not implemented!\n");
+
+	return 0;
+}
diff --git a/include/configs/uC5275.h b/include/configs/uC5275.h
new file mode 100644
index 0000000..418d306
--- /dev/null
+++ b/include/configs/uC5275.h
@@ -0,0 +1,263 @@
+/*
+ * Configuation settings for Arcturus Networks Inc.'s uC5274/5275 board.
+ *
+ * (c) Copyright 2010 Arcturus Networks Inc.
+ *     by David Wu <www.ArcturusNetworks.com>
+ *
+ * Based in part on: include/configs/M5275EVB.h
+ * 	By Arthur Shipkowski <art at videon-central.com>
+ * 	Copyright (C) 2005 Videon Central, Inc.
+ *
+ * Based off of M5272C3 board code by Josef Baumgartner
+ * <josef.baumgartner at telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _uC5275_H
+#define _uC5275_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_MCF52x2		/* define processor family */
+#define CONFIG_M5275		/* define processor type */
+#define PRODUCT_FACTORY		"Arcturus Networks Inc. "
+#define PRODUCT_REVISION	PRODUCTION_STRING
+
+#define __DOUBLE_MAP__
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT		(0)
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
+
+/* Configuration for environment
+ * Environment variables are embedded in the second 256k bytes of the
Flash
+ */
+#define CONFIG_ENV_ADDR			0xf0040000
+#define CONFIG_ENV_SIZE			0x40000
+#define CONFIG_ENV_IS_IN_FLASH		1
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Available command configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+#define CONFIG_NET_MULTI	1
+#define CONFIG_MII		1
+#define CONFIG_MII_INIT		1
+#define CONFIG_SYS_DISCOVER_PHY
+#define CONFIG_SYS_RX_ETH_BUFFER	8
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#define CONFIG_SYS_FEC0_PINMUX		0
+#define CONFIG_SYS_FEC0_MIIBASE	CONFIG_SYS_FEC0_IOBASE
+#define CONFIG_SYS_FEC1_PINMUX		0
+#define CONFIG_SYS_FEC1_MIIBASE	CONFIG_SYS_FEC1_IOBASE
+#define MCFFEC_TOUT_LOOP	50000
+/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
+#ifndef CONFIG_SYS_DISCOVER_PHY
+#define FECDUPLEX		FULL
+#define FECSPEED		_100BASET
+#else
+#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#endif
+#endif
+#endif
+
+#ifdef CONFIG_M5274
+#define CONFIG_SYS_PROMPT		"uC5274-> "
+#else
+#define CONFIG_SYS_PROMPT		"uC5275-> "
+#endif
+#define CONFIG_SYS_LONGHELP	/* undef to save memory */
+
+#if (CONFIG_CMD_KGDB)
+#	define CONFIG_SYS_CBSIZE	1024
+#else
+#	define CONFIG_SYS_CBSIZE	256
+#endif
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS	16
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_LOAD_ADDR	(CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
+				/* default kernel image address, end of ENV */
+
+#define CONFIG_BOOTDELAY		5
+#define CONFIG_SYS_MEMTEST_START	0x400
+#define CONFIG_SYS_MEMTEST_END		0x380000
+
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_NET_RETRY_COUNT	5
+#	define CONFIG_ETHADDR	00:00:00:00:00:00
+#ifdef CONFIG_HAS_ETH1
+#	define CONFIG_ETH1ADDR	00:00:00:00:00:00
+#endif
+#	define CONFIG_IPADDR	192.168.1.200
+#	define CONFIG_NETMASK	255.255.255.0
+#	define CONFIG_SERVERIP	192.168.1.1
+#	define CONFIG_GATEWAYIP	192.168.1.1
+#	define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* FEC_ENET */
+
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	"REVISION="PRODUCT_REVISION"\0"		\
+	"netdev=eth0\0"				\
+	"loadaddr=10000\0"			\
+	"uboot=u-boot.bin\0"			\
+	"load=tftp ${loadaddr} ${uboot}\0"	\
+	"upd=run load; run prog\0"		\
+	"prog=prot off f0000000 f003ffff;"	\
+	"era f0000000 f003ffff;"		\
+	"cp.b ${loadaddr} f0000000 ${filesize};"\
+	"setenv filesize;save\0"		\
+	""
+
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_CLK			150000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+#define CONFIG_SYS_MBAR			0x40000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
+#define CONFIG_SYS_INIT_RAM_END 0x10000	/* End of used area in internal
SRAM */
+#define CONFIG_SYS_GBL_DATA_SIZE 1000	/* bytes reserved for initial data
*/
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#if !defined(CONFIG_SYS_SDRAM_SIZE)
+#define CONFIG_SYS_SDRAM_SIZE           32	/* SDRAM size in MB */
+#endif
+
+#ifdef __DOUBLE_MAP__
+#ifdef __64MRam__
+#define CONFIG_SYS_SDRAM_SDMR0 0x07FC0001
+#elif defined(__32MRam__)
+#define CONFIG_SYS_SDRAM_SDMR0 0x03FC0001
+#else
+#define CONFIG_SYS_SDRAM_SDMR0 0x01FC0001
+#endif
+#else
+#ifdef defined(__64MRam__)
+#define CONFIG_SYS_SDRAM_SDMR0 0x03FC0001
+#elif defined(__32MRam__)
+#define CONFIG_SYS_SDRAM_SDMR0 0x01FC0001
+#else
+#define CONFIG_SYS_SDRAM_SDMR0 0x00FC0001
+#endif
+#endif
+
+#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_SYS_MONITOR_BASE		0x20000
+#else
+#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN		0x20000
+#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+
+#define CONFIG_SYS_BOOTMAPSZ
(CONFIG_SYS_SDRAM_BASE+(CONFIG_SYS_SDRAM_SIZE<<20))
+#define CONFIG_SYS_BOOTM_LEN		(CONFIG_SYS_SDRAM_SIZE << 20)
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1 /* max number of memory banks */
+#if !defined(CONFIG_SYS_MAX_FLASH_SECT)
+#   define CONFIG_SYS_MAX_FLASH_SECT 264 /* max number of sectors on one
chip */
+#endif
+#define CONFIG_SYS_FLASH_ERASE_TOUT	1000
+
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER	1
+#if !defined(CONFIG_SYS_SDRAM_SIZE)
+#define CONFIG_SYS_SDRAM_SIZE		0x01000000
+#endif
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+#define CONFIG_SYS_CS0_BASE		0xf0000000
+#define CONFIG_SYS_CS0_CTRL		0x00002980
+#define CONFIG_SYS_CS0_MASK		0x00FF0001
+
+#endif /* _uC5275_H */
-- 
1.5.6


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