[U-Boot] [PATCHv2 CFI flash]: Workaround for Numonyx Axcell P33/P30 256-Mbit 65nm bug

[Stefan Roese]

Hi Philippe,

On Tuesday 10 August 2010 15:31:12 Philippe De Muyter wrote:
> > > Because of requirement (3), I choosed to minimize the number of
> > > instructions between the `read lock status' and the `unlock' commands,
> > > hence the initialisation of `cmd' moved before the `read lock status'
> > > (hidden in `flash_isequal').
> 
> Yes, you're right.  I had misread the doc :(
> 
> > From my understanding, "only" the last 2 operations need to be in max.
> > 20µs interval. If this is the case, then I would prefer this code
> > version:
>
> I prefer it too.

Good! :)
 
> > 		case CFI_CMDSET_INTEL_EXTENDED:
> > 			/*
> > 			 * see errata called
> > 			 * "Numonyx Axcell P33/P30 Specification Update" :)
> > 			 */
> > 			
> > 			flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
> > 			if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
> > 			
> > 					    prot)) {
> > 				
> > 				int flag = disable_interrupts ();
> > 				unsigned short cmd;
> > 				
> > 				if (prot)
> > 				
> > 					cmd = FLASH_CMD_PROTECT_SET;
> > 				
> > 				else
> > 				
> > 					cmd = FLASH_CMD_PROTECT_CLEAR;
> > 				
> > 				/*
> > 				 * cmd must come before FLASH_CMD_PROTECT + 20us
> > 				 * Disable interrupts which might cause a timeout here.
> > 				 */
> 
> Should the above comment not stay closer to the disable_interrupts () call?

Perhaps yes. But a comment before the following 2 instructions would also
be good. Because this is the "hot path" that needs to be protected against
interrupts.
 
> > Yes, please let me know if this patch version also fixes the bug. If
> > this is the case, I would prefer that you change it accordingly.
> 
> I surmise it does, but I currently do not have a board to test.  I'll
> get new boards (with the same bug) soon, and I'll let you know then.

Thanks.

Cheers,
Stefan

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