[U-Boot] BDI3000 configuration for AppliedMicro 460EX revB

Stefan Roese sr at denx.de
Thu Aug 12 09:09:23 CEST 2010


Hi Felix,

On Thursday 12 August 2010 08:55:08 Felix Radensky wrote:
> Can someone please share a BDI3000 configuration for u-boot/kernel
> debugging on 460EX revB.

The one I'm using on my Canyonlands attached. As always you need to change 
your local settings (IP-addresses etc).

Cheers,
Stefan

--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de
-------------- next part --------------
;;;bdiGDB configuration file for AMCC 460EX Evaluation Board (Canyonlands)
;;;---------------------------------------------------------------------------
;;; Written by: Victor Gallardo (vgallardo at amcc.com)
;;;
;;; Before using, update the following parameters in the appropiate
;;; part locations below:
;;;     IP      <tftpboot sever ip address>
;;;     FILE    <u-boot.bin file location on tftpboot server>
;;;     FORMAT	<see comments where this is defined>
;;;     ERASE   <see comments where this is defined>
;;;
;;; To program u-boot.bin into NOR Flash do the following:
;;; (see FLASH section for more info):
;;;     > reset
;;;     > erase
;;;     > prog
;;;     > md 0xfff80000  ; verify if u-boot.bin size is 512KB
;;;     > md 0xfffa0000  ; verify if u-boot.bin size is 384KB
;;;
;;; To start u-boot do the following:
;;;     > reset
;;;     > go
;;;
;;; To read all 9 Board Control and Status Registers (BCSR) do the following:
;;;     > stop
;;;     > mdb 0xe1000000 9
;;;

[INIT]
;;;
;;; Setup TLB
;;;
WTLB	0xFF000075  0x4FF0003F  ;Boot Space 16MB
WTLB	0x80000055  0x4000003F  ;SRAM and OCM access
WTLB	0xE1000005  0x4E10003F	;BCSR 1KB
;;;
;;; Setup Boot Space and Flash access
;;;    Note: Flash is 64MB but Boot Space is only 16MB
;;;
WDCR	0x12	0x10		;Select EBC0_B0AP
WDCR	0x13	0x10055e00	;B0AP: Flash
WDCR	0x12	0x00		;Select EBC0_B0CR
WDCR	0x13	0xff09a000	;B0CR: 16MB, 16Bit at 0xFF000000
;;;
;;; Setup SRAM and OCM Access
;;;
WDCR    0x030   0x00000008      ;Disable L2 Cache and enable SRAM R/W access
WDCR	0x020   0x00000984	;Base address, size 64KB and R/W access
WDCR	0x021   0x00010984	;Base address, size 64KB and R/W access
WDCR	0x022   0x00020984	;Base address, size 64KB and R/W access
WDCR	0x023   0x00030984	;Base address, size 64KB and R/W access
WDCR	0x02A   0x00000000	;Disable parity checking
WDCR	0x0B0   0x00040984	;Base address, size 64KB and R/W access
;;;
;;; Setup Board Control and Status Registers (BCSR) Access
;;;
WDCR	0x12	0x12		;Select EBC0_B2AP
WDCR	0x13	0x00804240	;B2AP: BCSR
WDCR	0x12	0x02		;Select EBC0_B2AP
WDCR	0x13	0xe1018000	;B2CR: 1MB at 0xE1000000, r/w,  8-bit
;;;
;;; Disable Flash Boot Sector write protect
;;;
WM8	0xe1000006  0x00	; BCSR[5].1 = 0

[TARGET]
JTAGCLOCK	0	;use 8 MHz JTAG clock
CPUTYPE		440	;the used target CPU type
WAKEUP		100	;wakeup time after reset
BREAKMODE	HARD	;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE	HWBP	;JTAG or HWBP, HWBP uses one or two hardware breakpoints

[HOST]
IP          10.0.0.152	;Your tftpboot server IP address
FILE        /tftpboot/canyonlands/u-boot.bin
FORMAT      BIN
DUMP        /tftpboot/canyonlands/dump.bin
PROMPT      460EX>

[FLASH]
WORKSPACE  0x80000000	;workspace in SRAM for fast programming algorithm
CHIPTYPE   MIRRORX16	;Flash type
CHIPSIZE   0x01000000	;Flash is 64MB but Boot Space is only 16MB
BUSWIDTH   16		;The width of the flash memory bus in bits (8|16|32)
FILE       canyonlands/u-boot.bin  ;File location on tftpboot server
;;;
;;; If u-boot.bin size is 512KB then use offset 0xfff8000 to program
;;;
;FORMAT	    BIN 0xfff80000
;ERASE      0xfff80000  0x20000 ;erase 128KB
;ERASE      0xfffa0000  0x20000 ;erase 128KB
;ERASE      0xfffc0000  0x20000 ;erase 128KB
;ERASE      0xfffe0000  0x20000 ;erase 128KB
;;;
;;; Else if u-boot.bin size is 384KB then use offset 0xfffa000 to program
;;;
FORMAT      BIN 0xfffa0000
ERASE      0xfffa0000  0x20000 ;erase 128KB
ERASE      0xfffc0000  0x20000 ;erase 128KB
ERASE      0xfffe0000  0x20000 ;erase 128KB

[REGS]
IDCR1	0x010	0x011	;SDRAM0_CFGADDR and SDRAM0_CFGDATA
IDCR2	0x012	0x013	;EBC0_CFGADDR   and EBC0_CFGDATA
IDCR5	0x00C	0x00D	;CPR0_CFGADDR   and CPR0_CFGDATA
IDCR6	0x00E	0x00F	;SDR0_CFGADDR   and SDR0_CFGDATA
;;;
;;; If you have Firmware version 1.16 or greater, you can
;;; enable PMM support here and in reg definition file.
;;;
;PMM1	0x40000		;Peripheral (base addr 4_0000_0000)

FILE    /tftpboot/BDI2000/reg460ex.def



More information about the U-Boot mailing list