[U-Boot] [PATCH V7] POST cleanup.

Michael Zaidman michael.zaidman at gmail.com
Mon Dec 6 09:00:03 CET 2010


Dear Wolfgang,

On Sun, Nov 21, 2010 at 2:34 PM, Michael Zaidman
<michael.zaidman at gmail.com> wrote:
...
> On Tue, Oct 26, 2010 at 11:09 PM, Wolfgang Denk <wd at denx.de> wrote:
...
>> Why do we not simply reserve a word in the global data structure instead?

Please correct me if I am wrong, but the global data structure is
destined to keep its data integrity while switching from flash to RAM.
For this purpose, it is temporary located in the data cache (for those
architectures that do not have static ram on chip) which is available
from very beginning before RAM controller is initialized, afterwards
it is moved into RAM. The POST_WORD is destined for different purpose
- to preserve the data while passing through the watchdog reset and
this is the reason why it was placed into some kind of on chip memory
such as one of unused locations of the PowerQUICC dual port RAM for
mpc8xx/mpc8xxx architectures. In order to achieve the same effect with
data cache the desired data should be locked in the cache prior the
reset and unlocked afterwards. The data cache reaction on the SW reset
is architecture dependent and even if it is possible, that is not
obvious, not sure it worth the effort. For example, any kind of
mpc83xx reset will cause hard reseting of e300 core which in turn will
invalidate caches.


Regards,
Michael


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