[U-Boot] Overo NET_GPMC_CONFIG definitions

Scott Ellis scott at jumpnowtek.com
Mon Jan 4 12:14:52 CET 2010


Hello,

I am working with the Gumxtix Overo OMAP3 based systems.

The Overo expansion boards use an SMSC LAN9221 ethernet
controller. The NET_GPMC_CONFIG timing registers in 
include/asm-arm/arch-omap3/mem.h shared by the overo, ti/evm and 
tim11/devkit8000 are not optimal for the LAN9221. It looks like 
they might be correct for the ti/evm board's LAN9220 chip.

In particular, the minimum read/write cycle times required by 
the LAN9221 controller are only 45ns as opposed to 165ns required
by the LAN9220.

Adjusting the read/write cycle times in the GPMC registers to make 
them specific to the overo/LAN9221 connection, roughly doubles the 
read/write network speeds as measured with iperf and greatly reduces
rx dropped packets, usually to zero except under high network loads. 
With the old values, rx drops are common.

Here are the results of some one way tests with iperf running for 
5 minutes, >3GBytes transferred with the new values.

Old values 
Read  46 Mbits/sec
Write 44 Mbits/sec

New values
Read   88 Mbits/sec
Write  94 Mbits/sec

The iperf tests were with the linux 2.6.31 and 2.6.32 and the smsc911x 
driver. I also tested the u-boot smc911x driver doing tftp loads of the 
kernel and the performance was noticeably faster though I did not time 
it.

>From the source, it looks like the devkit8000 uses a Davicom DM9000 
ethernet controller. It might be of interest to check that board also.
I only have access to Overos.

A proposed patch below defines new values for the gpmc registers in 
overo.h and uses those in overo.c instead of the shared values defined 
in include/asm-arm/arch-omap3/mem.h.

There should be no impact to other boards.


 board/overo/overo.c |   14 +++++++-------
 board/overo/overo.h |    9 +++++++++
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c
index d42dc13..5e94a36 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -100,13 +100,13 @@ static void setup_net_chip(void)
        struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 
        /* Configure GPMC registers */
-       writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
-       writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
-       writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
-       writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
-       writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
-       writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
-       writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
+       writel(NET_LAN9221_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
+       writel(NET_LAN9221_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
+       writel(NET_LAN9221_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
+       writel(NET_LAN9221_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
+       writel(NET_LAN9221_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
+       writel(NET_LAN9221_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
+       writel(NET_LAN9221_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
 
        /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
        writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00,
&ctrl_base->gpmc_nwe);
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 4c7ac27..1873523 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -33,6 +33,15 @@ const omap3_sysinfo sysinfo = {
 #endif
 };
 
+/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
+#define NET_LAN9221_GPMC_CONFIG1    0x00001000
+#define NET_LAN9221_GPMC_CONFIG2    0x00080701
+#define NET_LAN9221_GPMC_CONFIG3    0x00020201
+#define NET_LAN9221_GPMC_CONFIG4    0x08030703
+#define NET_LAN9221_GPMC_CONFIG5    0x00060908
+#define NET_LAN9221_GPMC_CONFIG6    0x87030000
+#define NET_LAN9221_GPMC_CONFIG7    0x00000f6c
+
 /*
  * IEN  - Input Enable
  * IDIS - Input Disable


Peace,
Scott Ellis






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