[U-Boot] U-boot debugging on Canyonlands using BDI3000
Felix Radensky
felix at embedded-sol.com
Tue Jan 5 15:49:15 CET 2010
Hi,
Can someone please share BDI3000 configuration file suitable for
u-boot debugging on 460EX evaluation board (Canyonlands). I
use the following file, which doesn't work
[TARGET]
JTAGCLOCK 1 ;use 16 MHz JTAG clock
CPUTYPE 440 ;the used target CPU type
WAKEUP 500 ;wakeup time after reset
BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware
breakpoint
STEPMODE HWBP ;JTAG or HWBP, HWBP uses one or two
hardware breakpoints
;MMU XLAT ;MMU support enabled
;PTBASE 0x000000f0 ;pointer to the page table pointers
[HOST]
IP 10.0.0.10
PROMPT 460EX>
[REGS]
IDCR1 0x010 0x011 ;MCIF0_CFGADDR and MCIF0_CFGDATA
IDCR2 0x012 0x013 ;EBC0_CFGADDR and EBC0_CFGDATA
IDCR3 0x014 0x015 ;EBM0_CFGADDR and EBM0_CFGDATA
IDCR4 0x016 0x017 ;PPM0_CFGADDR and PPM0_CFGDATA
IDCR5 0x00C 0x00D ;CPR0_CFGADDR and CPR0_CFGDATA
IDCR6 0x00E 0x00F ;SDR0_CFGADDR and SDR0_CFGDATA
PMM1 0x40000 ;Peripheral (base addr 4_0000_0000)
PMM2 0xC0000 ;PCI (base addr C_0000_0000)
FILE $reg460ex.def
I get the following errors:
460EX>reset
- TARGET: processing user reset request
- TARGET: resetting target passed
- TARGET: processing target startup ....
- TARGET: core #0 PVR is 0x130218A2
- TARGET: processing target startup passed
460EX>ti
Core number : 0
Core state : debug mode
Debug entry cause : JTAG stop request
Current PC : 0x00040190
Current CR : 0x010ff7f5
Current MSR : 0x00000000
Current LR : 0x395cc044
# Step timeout detected
460EX>ti 0xfffffffc
Core number : 0
Core state : debug mode
Debug entry cause : JTAG stop request
Current PC : 0xfffffffc
Current CR : 0x00004009
Current MSR : 0x00000000
Current LR : 0x644e4009
# PPC: JTAG instruction stuff overrun
460EX>bi 0xfffff000
Breakpoint identification is 0
460EX>go
# PPC: JTAG instruction stuff overrun
I had a feeling that my Canyonlands is broken, but maybe I'm doing
something dumb.
BTW, I can program u-boot on NOR using this BDI3000 and different
configuration
file.
Thanks a lot.
Felix.
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