[U-Boot] [PATCH V3 09/11] ARM/PPC: add a common way to access registers

Stefano Babic sbabic at denx.de
Wed Jan 20 18:22:13 CET 2010


Some Freescale's processors of different architecture
have the same peripheral (eSDHC controller in PowerPC
and i.MX51). This patch adds neutral functions to access
to the internal registers of the SOCs that can be used
by both architectures.

Signed-off-by: Stefano Babic <sbabic at denx.de>
---
 include/asm-arm/io.h |   39 +++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/io.h |   21 +++++++++++++++++++++
 2 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index fec3a7e..d7d6f41 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -112,6 +112,45 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
 #define __raw_base_readw(base,off)	__arch_base_getw(base,off)
 #define __raw_base_readl(base,off)	__arch_base_getl(base,off)
 
+/* Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrbits(type, addr, clear) \
+	write##type(__raw_read##type(addr) & ~(clear), (addr))
+
+#define setbits(type, addr, set) \
+	write##type(__raw_read##type(addr) | (set), (addr))
+
+#define clrsetbits(type, addr, clear, set) \
+	write##type((__raw_read##type(addr) & ~(clear)) | (set), (addr))
+
+#define write_reg(type,a,v)	write##type(v,a)
+#define read_reg(type,a)	__raw_read##type(a)
+
+#define write_reg32(a,v)	write_reg(l,a,v)
+#define write_reg16(a,v)	write_reg(w,a,v)
+#define write_reg8(a,v)		write_reg(b,a,v)
+
+#define read_reg32(a)		read_reg(l,a)
+#define read_reg16(a)		read_reg(w,a)
+#define read_reg8(a)		read_reg(b,a)
+
+#define clrbits_reg32(addr, clear) clrbits(l, addr, clear)
+#define setbits_reg32(addr, set) setbits(l, addr, set)
+#define clrsetbits_reg32(addr, clear, set) clrsetbits(l, addr, clear, set)
+
+#define clrbits_reg16(addr, clear) clrbits(w, addr, clear)
+#define setbits_reg16(addr, set) setbits(w, addr, set)
+#define clrsetbits_reg16(addr, clear, set) clrsetbits(w, addr, clear, set)
+
+#define clrbits_reg8(addr, clear) clrbits(b, addr, clear)
+#define setbits_reg8(addr, set) setbits(b, addr, set)
+#define clrsetbits_reg8(addr, clear, set) clrsetbits(b, addr, clear, set)
+
 /*
  * Now, pick up the machine-defined IO definitions
  */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 4ddad26..d8f7cd7 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -242,6 +242,15 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 	__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
+/* Define cross-platform function to access to registers */
+
+#define write_reg32(a,v)	out_be32(a,v)
+#define write_reg16(a,v)	out_be16(a,v)
+#define write_reg8(a,v)		out_be8(a,v)
+#define read_reg32(a)		in_be32(a)
+#define read_reg16(a)		in_be16(a)
+#define read_reg8(a)		in_be8(a)
+
 /* Clear and set bits in one shot. These macros can be used to clear and
  * set multiple bits in a register using a single call. These macros can
  * also be used to set a multiple-bit bit pattern using a mask, by
@@ -278,6 +287,18 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
+#define clrbits_reg32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_reg32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_reg32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_reg16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_reg16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_reg16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_reg8(addr, clear) clrbits(be8, addr, clear)
+#define setbits_reg8(addr, set) setbits(be8, addr, set)
+#define clrsetbits_reg8(addr, clear, set) clrsetbits(be8, addr, clear, set)
+
 /*
  * Given a physical address and a length, return a virtual address
  * that can be used to access the memory range with the caching
-- 
1.6.3.3



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