[U-Boot] [PATCH] 85xx/eSDHC: fix eSDHC clock frequency mask

[Mingkai Hu]

The default value of the prescaler of eSDHC clock frequency
is 0x80, so we need to mask the MSB to set a different clock,
or else it maybe make the behavior of this prescaler undefined.

Signed-off-by: Mingkai Hu <Mingkai.hu at freescale.com>
---
 include/fsl_esdhc.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 89b8304..eac6a2b 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -32,7 +32,7 @@
 #define SYSCTL			0x0002e02c
 #define SYSCTL_INITA		0x08000000
 #define SYSCTL_TIMEOUT_MASK	0x000f0000
-#define SYSCTL_CLOCK_MASK	0x00000fff
+#define SYSCTL_CLOCK_MASK	0x0000fff0
 #define SYSCTL_PEREN		0x00000004
 #define SYSCTL_HCKEN		0x00000002
 #define SYSCTL_IPGEN		0x00000001
-- 
1.6.4