[U-Boot] [PATCH v2] ppc4xx: Fix sending type 1 PCI transactions

[Felix Radensky]

The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.

Signed-off-by: Felix Radensky <felix at embedded-sol.com>
---
v2: Removed 460SX from the list, it has no PCI controller.
    Fixed commit message

 drivers/pci/pci_indirect.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c
index ab51f8d..2070d01 100644
--- a/drivers/pci/pci_indirect.c
+++ b/drivers/pci/pci_indirect.c
@@ -59,7 +59,8 @@ indirect_##rw##_config_##size(struct pci_controller *hose,               \
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
 	return 0;                                                        \
 }
-#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
+#elif defined(CONFIG_440GX)  || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \
+      defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
 static int								 \
 indirect_##rw##_config_##size(struct pci_controller *hose,		 \
-- 
1.5.4.3