[U-Boot] [PATCH V4 09/11] ARM/PPC: add a common way to access registers

[Stefano Babic]

Some Freescale's processors of different architectures
have the same peripherals (eSDHC controller in PowerPC
and i.MX51). This patch adds neutral functions to access
to the internal registers of the SOCs that can be used
by both architectures.

Signed-off-by: Stefano Babic <sbabic at denx.de>
---
 include/asm-arm/io.h |   47 +++++++++++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/io.h |   31 +++++++++++++++++++++++++++++--
 2 files changed, 76 insertions(+), 2 deletions(-)

diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index fec3a7e..e7d6d81 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -113,6 +113,53 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
 #define __raw_base_readl(base,off)	__arch_base_getl(base,off)
 
 /*
+ * Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+#define clrbits(type, addr, clear) \
+	write##type(__raw_read##type(addr) & ~(clear), (addr))
+
+#define setbits(type, addr, set) \
+	write##type(__raw_read##type(addr) | (set), (addr))
+
+#define clrsetbits(type, addr, clear, set) \
+	write##type((__raw_read##type(addr) & ~(clear)) | (set), (addr))
+
+/*
+ * The following macros are used to access memory mapped registers
+ * in drivers running on different architecture (ppc, arm).
+ * They calls the respective intern macros depending on the
+ * architecture endianess.  This allows to have a common way to
+ * access peripherals from the driver point of view
+ * even on systems with different endianess.
+ */
+#define iowrite(type,a,v)	write##type(v,a)
+#define ioread(type,a)		__raw_read##type(a)
+
+#define iowrite32(a,v)	iowrite(l,a,v)
+#define iowrite16(a,v)	iowrite(w,a,v)
+#define iowrite8(a,v)	iowrite(b,a,v)
+
+#define ioread32(a)	ioread(l,a)
+#define ioread16(a)	ioread(w,a)
+#define ioread8(a)	ioread(b,a)
+
+#define clrbits_reg32(addr, clear) clrbits(l, addr, clear)
+#define setbits_reg32(addr, set) setbits(l, addr, set)
+#define clrsetbits_reg32(addr, clear, set) clrsetbits(l, addr, clear, set)
+
+#define clrbits_reg16(addr, clear) clrbits(w, addr, clear)
+#define setbits_reg16(addr, set) setbits(w, addr, set)
+#define clrsetbits_reg16(addr, clear, set) clrsetbits(w, addr, clear, set)
+
+#define clrbits_reg8(addr, clear) clrbits(b, addr, clear)
+#define setbits_reg8(addr, set) setbits(b, addr, set)
+#define clrsetbits_reg8(addr, clear, set) clrsetbits(b, addr, clear, set)
+
+/*
  * Now, pick up the machine-defined IO definitions
  */
 #if 0	/* XXX###XXX */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 4ddad26..bf3fc56 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -242,13 +242,13 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 	__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
-/* Clear and set bits in one shot. These macros can be used to clear and
+/*
+ * Clear and set bits in one shot. These macros can be used to clear and
  * set multiple bits in a register using a single call. These macros can
  * also be used to set a multiple-bit bit pattern using a mask, by
  * specifying the mask in the 'clear' parameter and the new bit pattern
  * in the 'set' parameter.
  */
-
 #define clrbits(type, addr, clear) \
 	out_##type((addr), in_##type(addr) & ~(clear))
 
@@ -279,6 +279,33 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
 /*
+ * The following macros are used to access memory mapped registers
+ * in drivers running on different architecture (ppc, arm).
+ * They calls the respective intern macros depending on the
+ * architecture endianess.  This allows to have a common way to
+ * access peripherals from the driver point of view
+ * even on systems with different endianess.
+ */
+#define iowrite32(a,v)	out_be32(a,v)
+#define iowrite16(a,v)	out_be16(a,v)
+#define iowrite8(a,v)	out_be8(a,v)
+#define ioread32(a)	in_be32(a)
+#define ioread16(a)	in_be16(a)
+#define ioread8(a)	in_be8(a)
+
+#define clrbits_reg32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_reg32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_reg32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_reg16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_reg16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_reg16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_reg8(addr, clear) clrbits(be8, addr, clear)
+#define setbits_reg8(addr, set) setbits(be8, addr, set)
+#define clrsetbits_reg8(addr, clear, set) clrsetbits(be8, addr, clear, set)
+
+/*
  * Given a physical address and a length, return a virtual address
  * that can be used to access the memory range with the caching
  * properties specified by "flags".
-- 
1.6.3.3