[U-Boot] [PATCH 9/9 V3] new board (eb_cpux9k2)
Tom
Tom.Rix at windriver.com
Sun Jan 31 02:44:26 CET 2010
Jens Scharsig wrote:
> * support for EB+CPUx9K2 board by BuS Elektronik GmbH & Co. KG
> * select via make eb_cpux9k2_config
> * this also demonstrates, how to use boards with AT91RM9200 cpu
> in at91 arch tree
>
> Signed-off-by: Jens Scharsig <js_at_ng at scharsoft.de>
> ---
> MAINTAINERS | 14 +-
> MAKEALL | 1 +
> Makefile | 3 +
> board/BuS/eb_cpux9k2/Makefile | 51 +++++
> board/BuS/eb_cpux9k2/config.mk | 1 +
> board/BuS/eb_cpux9k2/cpux9k2.c | 420 +++++++++++++++++++++++++++++++++++++++
> include/configs/eb_cpux9k2.h | 427 ++++++++++++++++++++++++++++++++++++++++
> 7 files changed, 912 insertions(+), 5 deletions(-)
> create mode 100644 board/BuS/eb_cpux9k2/Makefile
> create mode 100644 board/BuS/eb_cpux9k2/config.mk
> create mode 100644 board/BuS/eb_cpux9k2/cpux9k2.c
> create mode 100644 include/configs/eb_cpux9k2.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3879fde..0a0cf7c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -70,7 +70,7 @@ Joe D'Abbraccio <ljd015 at freescale.com>
>
> MPC837xERDB MPC837x
>
> -Kári Davíðsson <kd at flaga.is>
> +Kￜri Davￜￜsson <kd at flaga.is>
Take care that you do not mangle the accent marks.
Apply gobally.
>
> FLAGADM MPC823
>
> @@ -579,7 +579,7 @@ Sedji Gaouaou<sedji.gaouaou at atmel.com>
> at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC)
> at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC)
>
> -Marius Gröger <mag at sysgo.de>
> +Marius Grï¿œger <mag at sysgo.de>
>
> impa7 ARM720T (EP7211)
> ep7312 ARM720T (EP7312)
> @@ -645,7 +645,7 @@ Nishanth Menon <nm at ti.com>
> omap3_sdp3430 ARM CORTEX-A8 (OMAP3xx SoC)
> omap3_zoom1 ARM CORTEX-A8 (OMAP3xx SoC)
>
> -David Müller <d.mueller at elsoft.ch>
> +David Mï¿œller <d.mueller at elsoft.ch>
>
> smdk2410 ARM920T
> VCMA9 ARM920T
> @@ -703,6 +703,10 @@ Steve Sakoman <sakoman at gmail.com>
>
> omap3_overo ARM CORTEX-A8 (OMAP3xx SoC)
>
> +Jens Scharsig <esw at bus-elektronik.de>
> +
> + eb_cpux9k2 ARM920T (AT91RM9200 SoC)
> +
The email does not match what was given in the
copyrights. Which is the real address ?
> Robert Schwebel <r.schwebel at pengutronix.de>
>
> csb226 xscale
> @@ -749,7 +753,7 @@ Richard Woodruff <r-woodruff2 at ti.com>
>
> omap2420h4 ARM1136EJS
>
> -Alex Züpke <azu at sysgo.de>
> +Alex Zï¿œpke <azu at sysgo.de>
>
> lart SA1100
> dnp1110 SA1110
> @@ -774,7 +778,7 @@ Unknown / orphaned boards:
> # Board CPU #
> #########################################################################
>
> -Daniel Engström <daniel at omicron.se>
> +Daniel Engstrï¿œm <daniel at omicron.se>
>
> sc520_cdp x86
>
> diff --git a/MAKEALL b/MAKEALL
> index dd635bd..980834f 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -650,6 +650,7 @@ LIST_at91=" \
> CPU9260 \
> CPU9G20 \
> csb637 \
> + eb_cpux9k2 \
> kb9202 \
> meesc \
> mp2usb \
> diff --git a/Makefile b/Makefile
> index 793fcec..375f168 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2693,6 +2693,9 @@ CPUAT91_config : unconfig
> csb637_config : unconfig
> @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
>
> +eb_cpux9k2_config : unconfig
> + @$(MKCONFIG) $(@:_config=) arm arm920t eb_cpux9k2 BuS at91
> +
> kb9202_config : unconfig
> @$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
>
> diff --git a/board/BuS/eb_cpux9k2/Makefile b/board/BuS/eb_cpux9k2/Makefile
> new file mode 100644
> index 0000000..30e2f18
> --- /dev/null
> +++ b/board/BuS/eb_cpux9k2/Makefile
> @@ -0,0 +1,51 @@
> +#
> +# (C) Copyright 2003-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).a
> +
> +COBJS := cpux9k2.o
> +#led.o
Remove if uneeded.
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean: clean
> + rm -f $(LIB) core *.bak .depend
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/BuS/eb_cpux9k2/config.mk b/board/BuS/eb_cpux9k2/config.mk
> new file mode 100644
> index 0000000..ff2cfd1
> --- /dev/null
> +++ b/board/BuS/eb_cpux9k2/config.mk
> @@ -0,0 +1 @@
> +TEXT_BASE = 0x23f00000
> diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c
> new file mode 100644
> index 0000000..b2a69df
> --- /dev/null
> +++ b/board/BuS/eb_cpux9k2/cpux9k2.c
> @@ -0,0 +1,420 @@
> +/*
> + * (C) Copyright 2008-2009
> + * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
> + * Jens Scharsig <esw at bus-elektronik.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <exports.h>
> +#include <net.h>
> +#include <netdev.h>
> +#include <nand.h>
> +
> +#include <asm/io.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/at91_pio.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_mc.h>
> +
> +#ifdef CONFIG_STATUS_LED
> +#include <status_led.h>
> +#endif
> +
> +#ifdef CONFIG_VIDEO
> +#include <bus_vcxk.h>
> +
> +extern unsigned long display_width;
> +extern unsigned long display_height;
> +#endif
> +
> +#ifdef CONFIG_CMD_NAND
> +void cpux9k2_nand_hw_init(void);
> +#endif
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Miscelaneous platform dependent initialisations
> + */
> +
> +int board_init(void)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + /* Enable Ctrlc */
> + console_init_f();
> +
> + /* Correct IRDA resistor problem / Set PA23_TXD in Output */
> + writel(AT91_PMX_AA_TXD2, &pio->pioa.oer);
> +
> + gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
> + /* adress of boot parameters */
> + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> +
> +#ifdef CONFIG_STATUS_LED
> + status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
> +#endif
> +#ifdef CONFIG_CMD_NAND
> + cpux9k2_nand_hw_init();
> +#endif
> + return 0;
> +}
> +
Normally this is conditionally compiled in by
CONFIG_INIT_R
> +int misc_init_r(void)
> +{
> + uchar mac[8];
> + uchar tm;
> + uchar midx;
> + uchar macn6, macn7;
> +
May want to make search on ethernet conditional
on ethernet support
> + if (getenv("ethaddr") == NULL) {
> + if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
> + CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
> + (uchar *) &mac, sizeof(mac)) != 0) {
> + puts("Error reading MAC from EEPROM\n");
> + } else {
> + tm = 0;
> + macn6 = 0;
> + macn7 = 0xFF;
> + for (midx = 0; midx < 6; midx++) {
> + if ((mac[midx] != 0) && (mac[midx] != 0xFF))
> + tm++;
> + macn6 += mac[midx];
> + macn7 ^= mac[midx];
> + }
> + if ((macn6 != mac[6]) || (macn7 != mac[7]))
> + tm = 0;
> + if (tm)
> + eth_setenv_enetaddr("ethaddr", mac);
> + else
> + puts("Error: invalid MAC at EEPROM\n");
> + }
> + }
> + gd->jt[XF_do_reset] = (void *) do_reset;
> +
> +#ifdef CONFIG_STATUS_LED
> + status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
> +#endif
> + return 0;
> +}
> +
> +#ifdef CONFIG_RESET_PHY_R
> +void reset_phy(void)
> +{
> + udelay(10000);
> + eth_init(gd->bd);
> +}
> +#endif
> +
> +/*
> + * DRAM initialisations
> + */
> +
> +int dram_init(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM;
> + gd->bd->bi_dram[0].size =
> + get_ram_size((volatile long *) PHYS_SDRAM, PHYS_SDRAM_SIZE);
> + return 0;
> +}
> +
> +/*
> + * Ethernet initialisations
> + */
> +
> +#ifdef CONFIG_DRIVER_AT91EMAC
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> + rc = at91emac_register(bis, (u32) AT91_EMAC_BASE);
> + return rc;
> +}
> +#endif
> +
> +/*
> + * Disk On Chip (NAND) Millenium initialization.
> + * The NAND lives in the CS2* space
> + */
> +#if defined(CONFIG_CMD_NAND)
> +
> +#define MASK_ALE (1 << 22) /* our ALE is AD22 */
> +#define MASK_CLE (1 << 21) /* our CLE is AD21 */
> +
> +void cpux9k2_nand_hw_init(void)
> +{
> + unsigned long csr;
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
> + at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
> +
> + /* Setup Smart Media, fitst enable the address range of CS3 */
> + writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
> +
> + /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
> + csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
> + AT91_SMC_CSR_NWS(3) |
> + AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
> + AT91_SMC_CSR_WSEN;
ws
extra space
'= \tAT91 .. '
Similar small ws problems in this patch
Fix globally
> + writel(csr, &mc->smc.csr[3]);
> +
> + writel(AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE, &pio->pioc.asr);
> + writel(AT91_PMX_CA_BFCK | AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE,
> + &pio->pioc.pdr);
> +
> + /* Configure PC2 as input (signal Nand READY ) */
> + writel(AT91_PMX_CA_BFAVD, &pio->pioc.per);
> + writel(AT91_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
> + writel(AT91_PMX_CA_BFCK, &pio->pioc.codr);
> +
> + /* PIOC clock enabling */
> + writel(1 << AT91_ID_PIOC, &pmc->pcer);
> +}
> +
> +static void board_nand_hwcontrol(struct mtd_info *mtd,
> + int cmd, unsigned int ctrl)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + struct nand_chip *this = mtd->priv;
> + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
> +
> + if (ctrl & NAND_CTRL_CHANGE) {
> + IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
> +
> + if (ctrl & NAND_CLE)
> + IO_ADDR_W |= MASK_CLE;
> + if (ctrl & NAND_ALE)
> + IO_ADDR_W |= MASK_ALE;
> +
> + if ((ctrl & NAND_NCE))
> + writel(AT91_PIN_TO_MASK(0), &pio->pioc.codr);
> + else
> + writel(AT91_PIN_TO_MASK(0), &pio->pioc.sodr);
> +
> + this->IO_ADDR_W = (void *) IO_ADDR_W;
> + }
> + if (cmd != NAND_CMD_NONE)
> + writeb(cmd, this->IO_ADDR_W);
> +}
> +
> +static int board_nand_dev_ready(struct mtd_info *mtd)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + return ((readl(&pio->pioc.pdsr) & AT91_PIN_TO_MASK(2)) != 0);
> +}
> +
> +int board_nand_init(struct nand_chip *nand)
> +{
> + cpux9k2_nand_hw_init();
> + nand->ecc.mode = NAND_ECC_SOFT;
> + nand->cmd_ctrl = board_nand_hwcontrol;
> + nand->dev_ready = board_nand_dev_ready;
> + nand->chip_delay = 20;
> + return 0;
> +}
> +
> +#endif
> +
> +#if defined(CONFIG_VIDEO)
> +/*
> + * drv_video_init
> + * FUNCTION: initialize VCxK device
> + */
> +
> +int drv_video_init(void)
> +{
> +#ifdef CONFIG_SPLASH_SCREEN
> + unsigned long splash;
> +#endif
> + char *s;
> + unsigned long csr;
> + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
> + at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
> +
> + printf("Init Video as ");
> + s = getenv("displaywidth");
> + if (s != NULL)
> + display_width = simple_strtoul(s, NULL, 10);
> + else
> + display_width = 256;
> + s = getenv("displayheight");
> + if (s != NULL)
> + display_height = simple_strtoul(s, NULL, 10);
> + else
> + display_height = 256;
> + printf("%ld x %ld pixel matrix\n", display_width, display_height);
> +
> + /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */
> + csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) |
> + AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) |
> + AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
> + AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
> + writel(csr, &mc->smc.csr[2]);
> + writel(1 << AT91_ID_PIOB, &pmc->pcer);
> +
> + vcxk_init(display_width, display_height);
> +#ifdef CONFIG_SPLASH_SCREEN
> + s = getenv("splashimage");
> + if (s != NULL) {
> + splash = simple_strtoul(s, NULL, 16);
> + printf("use splashimage: %lx\n", splash);
> + video_display_bitmap(splash, 0, 0);
> + }
> +#endif
> + return 0;
> +}
> +#endif
> +
> +#ifdef CONFIG_SOFT_I2C
> +
> +void i2c_init_board(void)
> +{
> + u32 pin;
> + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> +
> + writel(1 << AT91_ID_PIOA, &pmc->pcer);
> + pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
> + writel(pin, &pio->pioa.idr);
> + writel(pin, &pio->pioa.pudr);
> + writel(pin, &pio->pioa.per);
> + writel(pin, &pio->pioa.oer);
> + writel(pin, &pio->pioa.sodr);
> +}
> +
> +/*
> +void board_i2c_active(void)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
> +}
> +
> +void board_i2c_tristate(void)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
> +}
> +
> +int board_i2c_read(void)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + return ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0);
> +}
> +
> +void board_i2c_sda(int bit)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + if (bit)
> + writel(AT91_PMX_AA_TWD, &pio->pioa.sodr);
> + else
> + writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
> +}
> +
> +
> +void board_i2c_scl(int bit)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + if (bit)
> + writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr);
> + else
> + writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
> +}
> +*/
These functions are commented out.
If they are unneed, remove them.
> +#endif
> +
> +/*--------------------------------------------------------------------------*/
> +
> +#ifdef CONFIG_STATUS_LED
> +
> +void __led_toggle(led_id_t mask)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> +
> + if (readl(&pio->piod.odsr) & mask)
> + writel(mask, &pio->piod.codr);
> + else
> + writel(mask, &pio->piod.codr);
> +}
> +
> +void __led_init(led_id_t mask, int state)
> +{
> + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> +
> + writel(1 << AT91_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
> + /* Disable peripherals on LEDs */
> + writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
> + /* Enable pins as outputs */
> + writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
> + /* Turn all LEDs OFF */
> + writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
> +
> + __led_set(mask, state);
> +}
> +
> +void __led_set(led_id_t mask, int state)
> +{
> + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
> + if (state == STATUS_LED_ON)
> + writel(mask, &pio->piod.codr);
> + else
> + writel(mask, &pio->piod.sodr);
> +}
> +
> +#endif
> +
> +/*---------------------------------------------------------------------------*/
> +
> +int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + int rcode = 0;
> + ulong side;
> + ulong bright;
> +
> + switch (argc) {
> + case 3:
> + side = simple_strtoul(argv[1], NULL, 10);
> + bright = simple_strtoul(argv[2], NULL, 10);
> + if ((side >= 0) && (side <= 3) &&
> + (bright >= 0) && (bright <= 1000)) {
> + vcxk_setbrightness(side, bright);
> + rcode = 0;
> + } else {
> + printf("parameters out of range\n");
> + printf("Usage:\n%s\n", cmdtp->usage);
> + rcode = 1;
> + }
> + break;
> + default:
> + printf("Usage:\n%s\n", cmdtp->usage);
> + rcode = 1;
> + break;
> + }
> + return rcode;
> +}
> +
> +/*---------------------------------------------------------------------------*/
> +
> +U_BOOT_CMD(
> + bright, 3, 0, do_brightness,
> + "bright - sets the display brightness\n",
> + " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
> +);
> +
> +/* EOF cpu9k2.c */
> diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h
> new file mode 100644
> index 0000000..2f58e6d
> --- /dev/null
> +++ b/include/configs/eb_cpux9k2.h
> @@ -0,0 +1,427 @@
> +/*
> + * (C) Copyright 2008-2009
> + * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
> + * Jens Scharsig <esw at bus-elektronik.de>
> + *
> + * Configuation settings for the EB+CPUx9K2 board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef _CONFIG_EB_CPUx9K2_H_
> +#define _CONFIG_EB_CPUx9K2_H_
> +
> +/*--------------------------------------------------------------------------*/
> +
> +#define CONFIG_IDENT_STRING " on EB+CPUx9K2"
> +#define CONFIG_VERSION_VARIABLE 1
Move non-cpu, non-soc, non-board configs lower in the filie
> +#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
> +#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
> +#define CONFIG_EB_CPUX9K2 1 /* on an EP+CPUX9K2 Board */
> +#define USE_920T_MMU 1
> +
> +#include <asm/arch/hardware.h> /* needed for port definitions */
> +
> +#define CONFIG_MISC_INIT_R
> +
> +/*--------------------------------------------------------------------------*/
> +
> +#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
> +
> +#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
> +#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
> +#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
> +
> +
> +#define CONFIG_BOOT_RETRY_TIME 30
> +#define CONFIG_CMDLINE_EDITING
> +
> +#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
> +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
> +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
> +#define CONFIG_SYS_PBSIZE \
> + (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
> +
> +#define CONFIG_STACKSIZE (32*1024) /* regular stack */
> +
> +/*
> + * ARM asynchronous clock
> + */
> +
> +#define AT91C_MAIN_CLOCK 179404800 /* from 12.288 MHz * 73 / 5 */
> +#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3)
> +#define CONFIG_SYS_HZ 1000
> +#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
> +
> +#define AT91_SLOW_CLOCK 32768 /* slow clock */
> +
> +#define CONFIG_CMDLINE_TAG 1
> +#define CONFIG_SETUP_MEMORY_TAGS 1
> +#define CONFIG_INITRD_TAG 1
> +
> +#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
> +/* flash */
> +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
> +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
> +
> +/* clocks */
> +#define CONFIG_SYS_PLLAR_VAL 0x20483E05 /* 179.4048 MHz for PCK */
> +#define CONFIG_SYS_PLLBR_VAL 0x104C3E0A /* 47.3088 MHz (for USB) */
> +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Clock */
> +
> +/*
> + * Size of malloc() pool
> + */
> +
> +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 520*1024)
> +#define CONFIG_SYS_GBL_DATA_SIZE 128
> +
> +/*
> + * sdram
> + */
> +
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM 0x20000000
> +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
> +
> +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
> + PHYS_SDRAM_SIZE - 0x00400000 - \
> + CONFIG_SYS_MALLOC_LEN)
> +
> +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* PIOC as D16/D31 */
> +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
> +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
> +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
> +#define CONFIG_SYS_SDRC_CR_VAL 0x2188c159 /* set up the SDRAM */
> +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */
> +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */
> +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */
> +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
> +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
> +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
> +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
> +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
> +
> +/*
> + * Command line configuration
> + */
> +
> +#include <config_cmd_default.h>
> +
> +#define CONFIG_CMD_BMP
> +#define CONFIG_CMD_DATE
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_I2C
> +#define CONFIG_CMD_JFFS2
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_PING
> +#define CONFIG_I2C_CMD_NO_FLAT
> +#define CONFIG_I2C_CMD_TREE
> +
> +#define CONFIG_SYS_LONGHELP
> +
> +/*
> + * Filesystems
> + */
> +
> +#define CONFIG_JFFS2_NAND 1
> +
> +#ifndef CONFIG_JFFS2_CMDLINE
> +#define CONFIG_JFFS2_DEV "nand0"
> +#define CONFIG_JFFS2_PART_OFFSET 0
> +#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
> +#else
> +#define MTDIDS_DEFAULT "nor0=0,nand0=1"
> +#define MTDPARTS_DEFAULT "mtdparts=" \
> + "0:" \
> + "384k(U-Boot)," \
> + "128k(Env)," \
> + "128k(Splash)," \
> + "4M(Kernel)," \
> + "-(FS)" \
> + ";" \
> + "1:" \
> + "-(jffs2)"
> +#endif /* CONFIG_JFFS2_CMDLINE */
> +
> +/*
> + * Hardware drivers
> + */
> +
> +/*
> + * UART/CONSOLE
> + */
> +
> +#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
> +
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_AT91RM9200_USART
> +#define CONFIG_DBGU /* define DBGU as console */
> +
> +/*
> + * network
> + */
> +
> +#define CONFIG_NET_RETRY_COUNT 10
> +#define CONFIG_RESET_PHY_R 1
> +
> +#define CONFIG_NET_MULTI 1
> +
> +#ifdef CONFIG_NET_MULTI
> +#define CONFIG_DRIVER_AT91EMAC 1
> +#define CONFIG_DRIVER_AT91EMAC_QUIET 1
> +#define CONFIG_SYS_RX_ETH_BUFFER 8
> +#define CONFIG_MII 1
> +#else
> +#define CONFIG_DRIVER_ETHER 1
> +#endif
> +
> +/*
> + * BOOTP options
> + */
> +#define CONFIG_BOOTP_BOOTFILESIZE
> +#define CONFIG_BOOTP_BOOTPATH
> +#define CONFIG_BOOTP_GATEWAY
> +#define CONFIG_BOOTP_HOSTNAME
> +
> +/*
> + * I2C-Bus
> + */
> +
> +#define CONFIG_SYS_I2C_SPEED 50000
> +#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
> +
> +#ifndef CONFIG_HARD_I2C
> +#define CONFIG_SOFT_I2C
> +
> +/* Software I2C driver configuration */
> +
> +#define AT91_PIN_SDA (1<<25) /* AT91C_PIO_PA25 */
> +#define AT91_PIN_SCL (1<<26) /* AT91C_PIO_PA26 */
> +
> +#define CONFIG_SYS_I2C_INIT_BOARD
> +
> +#define I2C_INIT i2c_init_board();
> +#define I2C_ACTIVE writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
> +#define I2C_TRISTATE writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
> +#define I2C_READ ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
> +#define I2C_SDA(bit) \
> + if (bit) \
> + writel(AT91_PMX_AA_TWD, &pio->pioa.sodr); \
> + else \
> + writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
> +#define I2C_SCL(bit) \
> + if (bit) \
> + writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr); \
> + else \
> + writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
> +
> +/*#define I2C_ACTIVE board_i2c_active();
> +#define I2C_TRISTATE board_i2c_tristate();
> +#define I2C_READ board_i2c_read();
> +#define I2C_SDA(bit) board_i2c_sda(bit);
> +#define I2C_SCL(bit) board_i2c_scl(bit);
> +*/
these are commended out
remove them if unneed
move them if needed
The config file is not the place to put function declarations
Tom
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