[U-Boot] [PATCH 4/4] egiga: add support for orion5x
Prafulla Wadaskar
prafulla at marvell.com
Mon Jul 5 13:01:38 CEST 2010
Prefer subject : Orion5X: add egiga driver support
> -----Original Message-----
> From: u-boot-bounces at lists.denx.de
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 02, 2010 10:23 PM
> To: u-boot at lists.denx.de
> Subject: [U-Boot] [PATCH 4/4] egiga: add support for orion5x
>
> Now that egiga is detached from kirkwood, we can add
> support for orion5x. This requires making the structures
> representing egiga registers and descriptors volatile,
> otherwise writes to them happen in the wrong order --
> this did not affect kirkwood but does affect orion5x.
>
> Signed-off-by: Albert Aribaud <albert.aribaud at free.fr>
> ---
> arch/arm/cpu/arm926ejs/orion5x/cpu.c | 18 +++
> arch/arm/include/asm/arch-orion5x/orion5x.h | 5 +
> board/LaCie/edminiv2/edminiv2.c | 36 +++++
> board/LaCie/edminiv2/edminiv2.h | 41 ++++++
> drivers/net/egiga.c | 4 +-
> drivers/net/egiga.h | 198
> +++++++++++++-------------
> include/configs/edminiv2.h | 30 +++-
> 7 files changed, 225 insertions(+), 107 deletions(-)
> create mode 100644 board/LaCie/edminiv2/edminiv2.h
>
> diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> index 03c6d06..a468c4d 100644
> --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
> @@ -268,3 +268,21 @@ int arch_misc_init(void)
> return 0;
> }
> #endif /* CONFIG_ARCH_MISC_INIT */
> +
> +#ifdef CONFIG_EGIGA
> +int cpu_eth_init(bd_t *bis)
> +{
> + egiga_initialize(bis);
> + return 0;
> +}
> +
> +/*
> + * Generates a non-random hex number just to make egiga.c happy
Do not make anybody happy
This is misleading for generic code,
instead you can eliminate this support under CONFIG_SYS_GEN_RANDOM_MAC macro
> + * if a MAC address has to be generated
> + */
> +unsigned char get_random_hex(void)
> +{
> + static unsigned char seed = 0;
> + return seed++;
> +}
> +#endif
> diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h
> b/arch/arm/include/asm/arch-orion5x/orion5x.h
> index 4008c84..ffe26bd 100644
> --- a/arch/arm/include/asm/arch-orion5x/orion5x.h
> +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
> @@ -56,6 +56,11 @@
> #define ORION5X_USB20_PORT1_BASE
> (ORION5X_REGISTER(0xA0000))
> #define ORION5X_EGIGA_BASE
> (ORION5X_REGISTER(0x72000))
>
> +/* EGIGA expects EGIGA0 #define'd */
> +#if defined (CONFIG_EGIGA)
> +#define EGIGA0_BASE ORION5X_EGIGA_BASE
> +#endif
> +
> #define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024)
>
> /* include here SoC variants. 5181, 5281, 6183 should go here when
> diff --git a/board/LaCie/edminiv2/edminiv2.c
> b/board/LaCie/edminiv2/edminiv2.c
> index 54c0ffe..d46ee4a 100644
> --- a/board/LaCie/edminiv2/edminiv2.c
> +++ b/board/LaCie/edminiv2/edminiv2.c
> @@ -27,6 +27,7 @@
> #include <common.h>
> #include <miiphy.h>
> #include <asm/arch/orion5x.h>
> +#include "edminiv2.h"
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -90,3 +91,38 @@ int board_init(void)
>
> return 0;
> }
Its better if you abstract reset_phy out from here, it is irreverent to patch subject.
secondly it should go as patch for board support (will be picked by different custodians)
> +
> +#if defined (CONFIG_CMD_NET) && defined (CONFIG_RESET_PHY_R)
> +/* Configure and enable MV88E1116 PHY */
> +void reset_phy(void)
> +{
> + u16 reg;
> + u16 devadr;
> + char *name = "egiga0";
> +
> + if (miiphy_set_current_dev(name))
> + return;
> +
> + /* command to read PHY dev address */
> + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> + printf("Err..%s could not read PHY dev address\n",
> + __FUNCTION__);
> + return;
> + }
> +
> + /*
> + * Enable RGMII delay on Tx and Rx for CPU port
> + * Ref: sec 4.7.2 of chip datasheet
> + */
> + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
> + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
> + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
> + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
> + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
> +
> + /* reset the phy */
> + miiphy_reset(name, devadr);
> +
> + printf("88E1116 Initialized on %s\n", name);
> +}
> +#endif /* CONFIG_RESET_PHY_R */
> diff --git a/board/LaCie/edminiv2/edminiv2.h
> b/board/LaCie/edminiv2/edminiv2.h
> new file mode 100644
> index 0000000..88e62b2
> --- /dev/null
> +++ b/board/LaCie/edminiv2/edminiv2.h
> @@ -0,0 +1,41 @@
> +/*
> + * (C) Copyright 2009
> + * Net Insight <www.netinsight.net>
> + * Written-by: Simon Kagstrom <simon.kagstrom at netinsight.net>
> + *
> + * Based on sheevaplug.h:
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Prafulla Wadaskar <prafulla at marvell.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef __EDMINIV2_BASE_H
> +#define __EDMINIV2_BASE_H
> +
> +/* PHY related */
> +#define MV88E1116_LED_FCTRL_REG 10
> +#define MV88E1116_CPRSP_CR3_REG 21
> +#define MV88E1116_MAC_CTRL_REG 21
> +#define MV88E1116_PGADR_REG 22
> +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
> +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
> +
> +#endif /* __EDMINIV2_BASE_H */
> diff --git a/drivers/net/egiga.c b/drivers/net/egiga.c
> index bb0de68..320e2ca 100644
> --- a/drivers/net/egiga.c
> +++ b/drivers/net/egiga.c
> @@ -37,6 +37,8 @@
> #include <asm/byteorder.h>
> #if defined (CONFIG_KIRKWOOD)
> #include <asm/arch/kirkwood.h>
> +#elif defined CONFIG_ORION5X
> +#include <asm/arch/orion5x.h>
> #endif
> #include "egiga.h"
>
> @@ -273,7 +275,7 @@ static void set_dram_access(struct
> egiga_registers *regs)
> win_param.attrib = EBAR_DRAM_CS3;
> break;
> default:
> - /* invalide bank, disable access */
> + /* invalid bank, disable access */
do not mix this, make this change as part of patch 1/4
> win_param.enable = 0;
> win_param.attrib = 0;
> break;
> diff --git a/drivers/net/egiga.h b/drivers/net/egiga.h
> index f758d3c..89ac519 100644
> --- a/drivers/net/egiga.h
> +++ b/drivers/net/egiga.h
> @@ -342,13 +342,13 @@
>
> /* structures represents Controller registers */
> struct egiga_barsz {
> - u32 bar;
> - u32 size;
> + volatile u32 bar;
> + volatile u32 size;
As you said in 0/4,
abstract volatile change as separate patch, this can be on the last patch in series.
Since most of the places registers are accessed through volatile pointers,
may be for DMA programming it is missing somewhere,
this need to be debugged instead of making volatile everywhere.
...snip...
> /* port device data struct */
> diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
> index c3d95a0..1f75920 100644
> --- a/include/configs/edminiv2.h
> +++ b/include/configs/edminiv2.h
> @@ -60,7 +60,7 @@
>
> #define ORION5X_MPP0_7 0x00000003
> #define ORION5X_MPP8_15 0x55550000
> -#define ORION5X_MPP16_23 0x00000000
> +#define ORION5X_MPP16_23 0x00005555
>
> /*
> * Board-specific values for Orion5x GPIO low level init:
> @@ -110,6 +110,14 @@
> #define CONFIG_SYS_FLASH_SECTSZ \
> {16384, 8192, 8192, 32768, \
> 65536, 65536, 65536, 65536, 65536, 65536, 65536}
> +/*
> + * Ethernet
> + */
> +
> +#define CONFIG_EGIGA /* Enable Egiga Gbe Controller Driver */
> +#define CONFIG_EGIGA_PORTS {1,0} /* enable port 0 only */
> +#define CONFIG_PHY_BASE_ADR 0x8
> +#define CONFIG_RESET_PHY_R /* use reset_phy() to init
> mv8831116 PHY */
Please move these definitions below inside #ifdef CONFIG_CMD_NET
>
> /* auto boot */
> #define CONFIG_BOOTDELAY 3 /* default enable autoboot */
> @@ -131,12 +139,20 @@
> * Commands configuration - using default command set for now
> */
> #include <config_cmd_default.h>
> -/*
> - * Disabling some default commands for staggered bring-up
> - */
> -#undef CONFIG_CMD_BOOTD /* no bootd since no net */
> -#undef CONFIG_CMD_NET /* no net since no eth */
> -#undef CONFIG_CMD_NFS /* no NFS since no net */
> +#define CONFIG_CMD_AUTOSCRIPT
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_ENV
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_PING
These are irrelevant to the patch subject, post separate patch for this
also check sheevaplug.h for making use of config_cmd_default.h (if not used)
> +
> +#ifdef CONFIG_CMD_NET
> +#define CONFIG_NETCONSOLE /* include NetConsole support */
> +#define CONFIG_NET_MULTI /* specify more that one ports
> available */
> +#define CONFIG_MII /* expose smi ove
> miiphy interface */
> +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link
> using phy */
> +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
> +#define CONFIG_EGIGA_INIT /* Enable GbePort0/1 for kernel */
> +#endif
regards..
Prafulla . .
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