[U-Boot] Error detecting CFI-compliant NOR flash on Orion5x (DNS323)

Sat Jul 10 13:31:07 CEST 2010

Hi folks,

I am trying to get a recent U-Boot working on my DNS323 (B1). Building 
on the work of Albert Aribaud, I have been able to get it to boot 
successfully from the existing U-Boot boot loader having defined 
CONFIG_SKIP_LOWLEVEL_INIT, and (with a tweak to the 
ORION5X_DEFADR_BOOTROM and ORION5X_DEFSZ_BOOTROM defines to match my 
flash base address and size) have been able to trigger the flash to 
enter the CFI QRY mode.

However, the standard flash_detect_cfi routine in 
drivers/mtd/cfi_flash.c is unable to detect my flash.

This is what I am currently able to do:

DNS323B1> mw.b 0xff8000aa 0x98
DNS323B1> md.b 0xff800020 0x40
ff800020: 51 51 52 52 59 59 02 02 00 00 40 40 00 00 00 00 
QQRRYY....@@....
ff800030: 00 00 00 00 00 00 27 27 36 36 00 00 00 00 04 04 
......''66......
ff800040: 00 00 0a 0a 00 00 05 05 00 00 04 04 00 00 17 17 
................
ff800050: 02 02 00 00 00 00 00 00 02 02 07 07 00 00 20 20 
..............

As you can see, the QRY response which is supposed to be at 0x20-0x22 is 
actually duplicated as QQRRYY at 0x20-0x25.

The flash part is a 8 MB Spansion S29GL064M90TFIR4, and the data sheet 
can be found at:

http://www.spansion.com/Support/Datasheets/s29gl-m_00_b8_e.pdf

Here is the output of a boot run, with DEBUG defined in flash.c:

-----x8-----x8-----
Starting kernel ...

U-Boot 2010.06-00074-gc63cbcc-dirty (Jul 10 2010 - 13:04:52)DNS323_B1

SoC:   Orion5x MV88F5182-A2
DRAM:  64 MiB
flash detect cfi
fwc addr ff800000 cmd f0 f0f0 16bit x 8 bit
fwc addr ff800000 cmd ff ffff 16bit x 8 bit
fwc addr ff8000aa cmd 98 9898 16bit x 8 bit
is= cmd 51(Q) addr ff800020 is= ffff 5151
fwc addr ff800aaa cmd 98 9898 16bit x 8 bit
is= cmd 51(Q) addr ff800020 is= ffff 5151
fwc addr ff800000 cmd f0 00f0 16bit x 16 bit
fwc addr ff800000 cmd ff 00ff 16bit x 16 bit
fwc addr ff8000aa cmd 98 0098 16bit x 16 bit
is= cmd 51(Q) addr ff800020 is= ffff 0051
fwc addr ff800aaa cmd 98 0098 16bit x 16 bit
is= cmd 51(Q) addr ff800020 is= ffff 0051
fwc addr ff800000 cmd f0 f0f0f0f0 32bit x 8 bit
fwc addr ff800000 cmd ff ffffffff 32bit x 8 bit
fwc addr ff800154 cmd 98 98989898 32bit x 8 bit
is= cmd 51(Q) addr ff800040 is= ffffffff 51515151
fwc addr ff801554 cmd 98 98989898 32bit x 8 bit
is= cmd 51(Q) addr ff800040 is= ffffffff 51515151
fwc addr ff800000 cmd f0 00f000f0 32bit x 16 bit
fwc addr ff800000 cmd ff 00ff00ff 32bit x 16 bit
fwc addr ff800154 cmd 98 00980098 32bit x 16 bit
is= cmd 51(Q) addr ff800040 is= ffffffff 00510051
fwc addr ff801554 cmd 98 00980098 32bit x 16 bit
is= cmd 51(Q) addr ff800040 is= ffffffff 00510051
fwc addr ff800000 cmd f0 000000f0 32bit x 32 bit
fwc addr ff800000 cmd ff 000000ff 32bit x 32 bit
fwc addr ff800154 cmd 98 00000098 32bit x 32 bit
is= cmd 51(Q) addr ff800040 is= ffffffff 00000051
fwc addr ff801554 cmd 98 00000098 32bit x 32 bit
is= cmd 51(Q) addr ff800040 is= ffffffff 00000051
fwrite addr ff800000 cmd f0 f0f0f0f0f0f0f0f0 64 bit x 8 bit
fwrite addr ff800000 cmd ff ffffffffffffffff 64 bit x 8 bit
fwrite addr ff8002a8 cmd 98 9898989898989898 64 bit x 8 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5151515151515151
fwrite addr ff802aa8 cmd 98 9898989898989898 64 bit x 8 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5151515151515151
fwrite addr ff800000 cmd f0 f000f000f000f000 64 bit x 16 bit
fwrite addr ff800000 cmd ff ff00ff00ff00ff00 64 bit x 16 bit
fwrite addr ff8002a8 cmd 98 9800980098009800 64 bit x 16 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5100510051005100
fwrite addr ff802aa8 cmd 98 9800980098009800 64 bit x 16 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5100510051005100
fwrite addr ff800000 cmd f0 f0000000f0000000 64 bit x 32 bit
fwrite addr ff800000 cmd ff ff000000ff000000 64 bit x 32 bit
fwrite addr ff8002a8 cmd 98 9800000098000000 64 bit x 32 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5100000051000000
fwrite addr ff802aa8 cmd 98 9800000098000000 64 bit x 32 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5100000051000000
fwrite addr ff800000 cmd f0 f000000000000000 64 bit x 64 bit
fwrite addr ff800000 cmd ff ff00000000000000 64 bit x 64 bit
fwrite addr ff8002a8 cmd 98 9800000000000000 64 bit x 64 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5100000000000000
fwrite addr ff802aa8 cmd 98 9800000000000000 64 bit x 64 bit
is= cmd 51(Q) addr ff800080 is= ffffffffffffffff 5100000000000000
not found
## Unknown FLASH on Bank 1 (ff800000) - Size = 0x00000000 = 0 MB
Flash: 0 Bytes
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
DNS323B1>

-----x8-----x8-----

I have tried defining the flash as a 16-bit part with:

#define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT

(which was used to generate the above bootlog), as well as 8-bit 
(omitting that define), and neither is able to detect the flash part.

It seems that it is a mixed 8/16 bit device, and the current u-boot code 
does not support that very well. Either that, or I have not found the 
right defines.

If anyone has any ideas of what I am doing wrong, or what I should do to 
debug this further, please do let me know.

My current diff against mainline u-boot is included as an attachment (I 
know, sorry, but Thunderbird tends to mangle inline patches). Please 
ignore board_flash_get_legacy in board/Marvell/dns323_b1/dns323_b1.c, I 
do not define CONFIG_FLASH_CFI_LEGACY. This is just in case there is no 
alternative solution via the standard CFI routines, and is a pure copy 
and paste from the edminiv2 code.

Regards,

Rogan
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