[U-Boot] [PATCH 8/8] powerpc/85xx: Add memory test feature for mpc85xx.

[Wolfgang Denk]

Dear Kumar Gala,

In message <1279120502-6289-8-git-send-email-galak at kernel.crashing.org> you wrote:
> From: york <yorksun at freescale.com>
> 
> If enabled in config file and hwconfig, the memory test is performed
> after DDR initialization when U-boot stills runs in flash and cache.
> Whole memory is testable. However, only the low 2GB space is mapped
> for DDR. The testing is conducted in the 2GB window and uses TLBs to
> map the higher physical address into the 2GB window if the total
> memory is more than 2GB. After the testing, DDR is remapped with up
> to 2GB memory from the lowest address.
> 
> Memory testing has different patterns which may be improved later.
> 
> If memory test fails, DDR DIMM SPD and DDR controller registers are
> dumped. All zero values are omitted for better viewing.
> 
> A worker function __setup_ddr_tlbs() is introduced to implemente more
> control on physical address mapping.
> 
> Signed-off-by: York Sun <yorksun at freescale.com>
> ---
>  arch/powerpc/cpu/mpc85xx/Makefile  |    2 +
>  arch/powerpc/cpu/mpc85xx/memtest.c |  369 ++++++++++++++++++++++++++++++++++++

NAK.

Please do not reinvent the wheel and add yet another meory test. Use
one of the existing memory tests we already have -
post/drivers/memory.c comes to mind.

Best regards,

Wolfgang Denk

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