[U-Boot] Question on non-muxed eLBC at Freescale PQ II/III

[André Schwarz]

All,

during schematic design of a MPC8377 based board I stumbled over an
issue with the local bus holding various Nor-/Nand-Flash and SRAM
devices.

Freescale's eLBC Controller supports muxed and non-muxed addressing
modes. All FSL reference schematics are using muxed mode utilizing an
address latch and bi-directional data buffer controlled by LBCTRL
signal.


The non-muxed mode doesn't need this latching stuff but is limited to 21
address signals ... which would enough for me.

Has anybody done this before or is actively using a system with that
kind of eLBC config ?
Are there any known issues with non-muxed mode ?

Any hints are welcome.


Regards,
André Schwarz


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