[U-Boot] Non standard CFI detection tweaks

Reinhard Meyer (-VC) reinhard.meyer at emk-elektronik.de
Tue Jul 20 12:22:56 CEST 2010


Rogan Dawes schrieb:
> Unfortunately, but understandably, it makes no difference whatsoever to 
> the behaviour of the flash chip. I can still put it into QRY mode, where 
> I get the doubled QQRRYY response, but the flash is not detected any 
> better than it was previously.
OOPS:

On our system (top5200) the behaviour is exactly as yours:

=> mm.b ff0000aa
ff0000aa: 00 ? 98
ff0000ab: 00 ? .
=> md.l ff000000
ff000000: 00000000 00000000 00000000 00000000    ................
ff000010: 00000000 00000000 00000000 00000000    ................
ff000020: 51515252 59590202 00004040 00000000    QQRRYY....@@....
ff000030: 00000000 00002727 36360000 00000707    ......''66......
ff000040: 07070a0a 00000303 05050404 00001a1a    ................
ff000050: 02020000 05050000 0101ffff 01010000    ................
ff000060: 02020000 00000000 00000000 00000000    ................
ff000070: 00000000 00000000 00000000 00000000    ................
ff000080: 50505252 49493131 33331010 02020101    PPRRII1133......
ff000090: 00000808 00000000 0202b5b5 c5c50404    ................
ff0000a0: 01010000 00000000 00000000 00000000    ................
ff0000b0: 00000000 00000000 00000000 00000000    ................
ff0000c0: 00000000 00000000 00000000 00000000    ................
ff0000d0: 00000000 00000000 00000000 00000000    ................
ff0000e0: 00000000 00000000 00000000 00000000    ................
ff0000f0: 00000000 00000000 00000000 00000000    ................
=> 

But because of other constraints and since the port was done in 2003
we never tried to use the CFI driver ;)
(our flash has 64MB but only the first 16 MB are memory mapped.)

Hardware: Spansion 29GL512 in 8-Bit mode, that means
Flash D15/A(-1) connected to CPU A0
Flash A0 connected to CPU A1
Flash A1 connected to CPU A2
etc...

You might want to look at board/emk/common/flash.c for insights :)

Reinhard



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