[U-Boot] [PATCH 1/8] powerpc/8xxx: Enabled hwconfig for memory interleaving

[Kumar Gala]

On Jul 14, 2010, at 10:14 AM, Kumar Gala wrote:

> Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
> hwconfig parameters. The syntax is
> 
>    setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"
> 
> The mode values for memory controller interleaving are
>    cacheline
>    page
>    bank
>    superbank
> 
> The mode values for bank interleaving are
>    cs0_cs1
>    cs2_cs3
>    cs0_cs1_and_cs2_cs3
>    cs0_cs1_cs2_cs3
> 
> Signed-off-by: York Sun <yorksun at freescale.com>
> ---
> arch/powerpc/cpu/mpc8xxx/ddr/options.c |   40 ++++++++++++++++++++------------
> doc/README.fsl-ddr                     |   25 +++++++++++--------
> 2 files changed, 39 insertions(+), 26 deletions(-)

applied to 85xx

- k