[U-Boot] [PATCH 3/3] add support for pollux-based leapfrog didj

Wolfgang Denk wd at denx.de
Tue Jun 1 21:40:39 CEST 2010


Dear Brian Cavagnolo,

In message <1275417750-10020-3-git-send-email-brian at cozybit.com> you wrote:
> 
> Signed-off-by: Brian Cavagnolo <brian at cozybit.com>
> Signed-off-by: Andrey Yurovsky <yurovsky at gmail.com>

You should probably be a bit more verbose. I guess few people
understand what a "pollux-based leapfrog didj" might be.

>  Makefile               |    7 +++
>  board/didj/Makefile    |   54 ++++++++++++++++++++++++
>  board/didj/config.mk   |    1 +
>  board/didj/didj.c      |  107 ++++++++++++++++++++++++++++++++++++++++++++++++
>  include/configs/didj.h |   71 ++++++++++++++++++++++++++++++++
>  5 files changed, 240 insertions(+), 0 deletions(-)
>  create mode 100644 board/didj/Makefile
>  create mode 100644 board/didj/config.mk
>  create mode 100644 board/didj/didj.c
>  create mode 100644 include/configs/didj.h

Entries to MAKEALL and MAINTAINERS missing.

> diff --git a/Makefile b/Makefile
> index c26e491..04d47a6 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -3120,6 +3120,13 @@ voiceblue_config:	unconfig
>  	@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
>  
>  #########################################################################
> +# pollux Systems
> +#########################################################################
> +
> +didj_config	: unconfig
> +	@$(MKCONFIG) $(@:_config=) arm arm926ejs didj NULL pollux

Please keep lists sorted.

...
> +#define UARTDIV		((((PLL1_FREQ<<1)/(115200*(DEFAULT_BRD + 1)*16)) + 1)>>1)

Line too long, please fix globally.

> +int board_init (void)
> +{
> +
> +	unsigned long tmp;
> +
> +	icache_enable();
> +
> +	/* Didj uses PLL0 for the CPU clock at 393216000 Hz */
> +	REG32(PLLSETREG0) = PLL_REG(801, 55, 0);
> +	/* PLL1 (bus clock) 147000000 Hz */
> +	REG32(PLLSETREG1) = PLL_REG(196, 9, 2);

NAK. Please use C structs with proper I/O accessors instead.

> +	/* UART0 pins can either be a UART or GPIO.  We want UART.  For this we
> +	 * must configure GPIOA, pin 8 to be the UART TX, which is it's
> +	 * alternative function.
> +	 */

Incorrect multiline comment style. please fix globally.


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
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