[U-Boot] [PATCH] USB OHCI support for at91sam9g45 SoC

[Remy Bohmer]

Hi,

2010/6/9 Sergey Matyukevich <geomatsi at gmail.com>:
> Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.
>
> Note that according to errata from Atmel, OHCI is not operational
> on the first revision of at91sam9g45 chip. So this patch enables
> OHCI support for later revisions.
>
> Signed-off-by: Sergey Matyukevich <geomatsi at gmail.com>

Applied to u-boot-usb (after a small coding style fix)
Thanks.

Kind regards,

Remy

> ---
>  arch/arm/include/asm/arch-at91/at91_pmc.h       |   14 ++++++++++++--
>  board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |   13 +++++++++++++
>  drivers/usb/host/ohci-at91.c                    |   13 +++++++++++++
>  3 files changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h
> index 5b1a85d..2f9ad96 100644
> --- a/arch/arm/include/asm/arch-at91/at91_pmc.h
> +++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
> @@ -35,13 +35,15 @@ typedef struct at91_pmc {
>        u32     pcer;           /* 0x10 Peripheral Clock Enable Register */
>        u32     pcdr;           /* 0x14 Peripheral Clock Disable Register */
>        u32     pcsr;           /* 0x18 Peripheral Clock Status Register */
> -       u32     reserved1;
> +       u32     uckr;           /* 0x1C UTMI Clock Register */
>        u32     mor;            /* 0x20 Main Oscilator Register */
>        u32     mcfr;           /* 0x24 Main Clock Frequency Register */
>        u32     pllar;          /* 0x28 PLL A Register */
>        u32     pllbr;          /* 0x2C PLL B Register */
>        u32     mckr;           /* 0x30 Master Clock Register */
> -       u32     reserved2[3];
> +       u32     reserved1;
> +       u32     usb;            /* 0x38 USB Clock Register */
> +       u32     reserved2;
>        u32     pck[4];         /* 0x40 Programmable Clock Register 0 - 3 */
>        u32     reserved3[4];
>        u32     ier;            /* 0x60 Interrupt Enable Register */
> @@ -199,6 +201,14 @@ typedef struct at91_pmc {
>  #define                        AT91_PMC_PDIV_2                 (1 << 12)
>
>  #ifdef CONFIG_AT91_LEGACY
> +#define                AT91_PMC_USB                    (AT91_PMC + 0x38)       /* USB Clock Register */
> +#endif
> +#define                AT91_PMC_USBS_USB_PLLA          (0x0)           /* USB Clock Input is PLLA */
> +#define                AT91_PMC_USBS_USB_UPLL          (0x1)           /* USB Clock Input is UPLL */
> +#define                AT91_PMC_USBDIV_8               (0x7 <<  8)     /* USB Clock divided by 8 */
> +#define                AT91_PMC_USBDIV_10              (0x9 <<  8)     /* USB Clock divided by 10 */
> +
> +#ifdef CONFIG_AT91_LEGACY
>  #define        AT91_PMC_PCKR(n)        (AT91_PMC + 0x40 + ((n) * 4))   /* Programmable Clock 0-3 Registers */
>
>  #define        AT91_PMC_IER            (AT91_PMC + 0x60)       /* Interrupt Enable Register */
> diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> index edfb627..8fa0449 100644
> --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
> @@ -87,6 +87,16 @@ static void at91sam9m10g45ek_nand_hw_init(void)
>  }
>  #endif
>
> +#ifdef CONFIG_CMD_USB
> +static void at91sam9m10g45ek_usb_hw_init(void)
> +{
> +       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE);
> +
> +       at91_set_gpio_output(AT91_PIN_PD1, 0);
> +       at91_set_gpio_output(AT91_PIN_PD3, 0);
> +}
> +#endif
> +
>  #ifdef CONFIG_MACB
>  static void at91sam9m10g45ek_macb_hw_init(void)
>  {
> @@ -251,6 +261,9 @@ int board_init(void)
>  #ifdef CONFIG_CMD_NAND
>        at91sam9m10g45ek_nand_hw_init();
>  #endif
> +#ifdef CONFIG_CMD_USB
> +       at91sam9m10g45ek_usb_hw_init();
> +#endif
>  #ifdef CONFIG_HAS_DATAFLASH
>        at91_spi0_hw_init(1 << 0);
>  #endif
> diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
> index b2e03bc..f791df7 100644
> --- a/drivers/usb/host/ohci-at91.c
> +++ b/drivers/usb/host/ohci-at91.c
> @@ -41,6 +41,14 @@ int usb_cpu_init(void)
>        writel(get_pllb_init(), &pmc->pllbr);
>        while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
>                ;
> +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> +       /* Enable UPLL */
> +       writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr);
> +       while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
> +               ;
> +
> +       /* Select PLLA as input clock of OHCI */
> +       writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
>  #endif
>
>        /* Enable USB host clock. */
> @@ -72,6 +80,11 @@ int usb_cpu_stop(void)
>        writel(0, &pmc->pllbr);
>        while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
>                ;
> +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> +       /* Disable UPLL */
> +       writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
> +       while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
> +               ;
>  #endif
>
>        return 0;
> --
> 1.6.2.5
>
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