[U-Boot] several problems with ethernet on MCF5445x

w.wegner at astro-kom.de w.wegner at astro-kom.de
Tue Mar 23 15:50:11 CET 2010


Dear list,

I am trying to get ethernet to work on my custom MCF54455 board
and having some trouble.

I have a DP83848J PHY connected in MII mode to each of the FEC0
and FEC1 ports (seperate MDIO connection). Both PHYs are set to
address 0x0. *)

In my config (basically copied from M54455EVB), I set:

#define CONFIG_NET_MULTI		1
#define CONFIG_MII		1
#define CONFIG_MII_INIT		1
#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_SYS_FEC0_PINMUX	0
#define CONFIG_SYS_FEC1_PINMUX	0
#define CONFIG_SYS_FEC0_MIIBASE	CONFIG_SYS_FEC0_IOBASE
#define CONFIG_SYS_FEC1_MIIBASE	CONFIG_SYS_FEC1_IOBASE
[...]
#define CONFIG_HAS_ETH1
/*
 * this is defined on a per-target basis in immap.h - not a very clean
 * solution, so I define it here:
 */
#define CONFIG_SYS_FEC1_IOBASE		(MMAP_FEC1)

This gives me 2 FEC devices on startup.

My problems:
- with CONFIG_SYS_FEC1_MIIBASE set as above, U-Boot crashes upon
  "Retry count exceeded; starting again" during unsuccessful dhcp; this does
  not happen when I set it to CONFIG_SYS_FEC0_IOBASE. (But this setting
  seems wrong to me, as I have seperate MDIO connections)
- ethernet does not work at all unless I comment out
		if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
			gpio->par_fec |= GPIO_PAR_FEC_FEC0_RMII_GPIO;
		else
			gpio->par_fec |= GPIO_PAR_FEC_FEC1_RMII_ATA;
  in mcf5445x/cpu_init.c: fecpin_setclear() (and initialize PAR_FEC in my own
  board init code).
  I do not understand what this code is for at all?
- what sense do CONFIG_SYS_FEC[01]_PINMUX have? They are filled into
  the "pinmux" field of struct fec_info_s in mcffec.c, but I did not find a place
  using them? From their naming I would have expected them to be responsible
  for correct pin mux setting (PAR_FEC), but then they would have to be used
  by fecpin_setclear(), which again would introduce weird dependencies on the
  mcffec.c code.

*) Is it needed/useful to set both PHYs to different addresses although they
  are connected to seperate MDIO connections (and seemingly correctly
  found when booting the linux kernel)?

Can anybody comment on this? Did I overlook something about where the
pin assignment is normally configured, or is it really just some strange
coincidence that it works on the EVB but not on my board?
 
Regards,
Wolfgang



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