[U-Boot] [PATCH/RFC 6/6] pci: Use intelligent indentation for CONFIG_PCI_SCAN_SHOW

[Wolfgang Denk]

Dear Peter Tyser,

In message <1288393169-9814-6-git-send-email-ptyser at xes-inc.com> you wrote:
> When CONFIG_PCI_SCAN_SHOW is defined U-Boot prints out PCI devices as
> they are found during bootup, eg:
>   PCIE1: connected as Root Complex
>         01:00.0 - 10b5:8518 - Bridge device
>         02:01.0 - 10b5:8518 - Bridge device
>         03:00.0 - 10b5:8112 - Bridge device
>         04:01.0 - 8086:1010 - Network controller
>         04:01.1 - 8086:1010 - Network controller
>         02:02.0 - 10b5:8518 - Bridge device
>         02:03.0 - 10b5:8518 - Bridge device
>         06:00.0 - 10b5:8518 - Bridge device
>         07:00.0 - 10b5:8518 - Bridge device
>         08:00.0 - 1957:0040 - Processor
>         07:01.0 - 10b5:8518 - Bridge device
>         09:00.0 - 10b5:8112 - Bridge device
>         07:02.0 - 10b5:8518 - Bridge device
>   PCIE1: Bus 00 - 0b
>   PCIE2: connected as Root Complex
>         0d:00.0 - 1957:0040 - Processor
>   PCIE2: Bus 0c - 0d
> 
> This information is useful, but its difficult to determine the PCI bus
> topology.  To things clearer, we can use indention to make it more
> obvious how the PCI bus is organized.  For the example above, the
> updated output with this change is:
> 
>   PCIE1: connected as Root Complex
>     01:00.0     - 10b5:8518 - Bridge device
>      02:01.0    - 10b5:8518 - Bridge device
>       03:00.0   - 10b5:8112 - Bridge device
>        04:01.0  - 8086:1010 - Network controller
>        04:01.1  - 8086:1010 - Network controller
>      02:02.0    - 10b5:8518 - Bridge device
>      02:03.0    - 10b5:8518 - Bridge device
>       06:00.0   - 10b5:8518 - Bridge device
>        07:00.0  - 10b5:8518 - Bridge device
>         08:00.0 - 1957:0040 - Processor
>        07:01.0  - 10b5:8518 - Bridge device
>         09:00.0 - 10b5:8112 - Bridge device
>        07:02.0  - 10b5:8518 - Bridge device
>   PCIE1: Bus 00 - 0b
>   PCIE2: connected as Root Complex
>     0d:00.0     - 1957:0040 - Processor
>   PCIE2: Bus 0c - 0d
> 
> In the examples above, an MPC8640 is connected to a PEX8518 PCIe switch
> (01:00 and 02:0x), which is connected to another PEX8518 PCIe switch
> (06:00 and 07:0x), which then connects to a MPC8572 processor (08:00).
> Also, the MPC8640's PEX8518 PCIe switch is connected to a PCI ethernet
> card (04:01) via a PEX8112 PCIe-to-PCI bridge (03:00).
> 
> Signed-off-by: Peter Tyser <ptyser at xes-inc.com>
> ---
>  drivers/pci/pci.c |   16 ++++++++++++++--
>  1 files changed, 14 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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