[U-Boot] [PATCH 3/3] tqm85xx: Update PCI code

[Peter Tyser]

On Wed, 2010-10-27 at 08:47 +0200, Wolfgang Denk wrote:
> Dear Peter Tyser,
> 
> In message <1288156533.1971.6.camel at ptyser-laptop> you wrote:
> >
> > Can you send the entire bootup output?  The code is based on Freescale
> > reference boards, eg the mpc8568mds, so I'd guess the problem is not
> > tqm85xx-specific.
> 
> Sure. Here it is:

Thanks.

> U-Boot 2010.09-00558-g79e6313 (Oct 26 2010 - 21:31:41)
> 
> CPU:   8555E, Version: 1.1, (0x80790011)
> Core:  Unknown, Version: 2.0, (0x80200020)
> Clock Configuration:
>        CPU0:833.333 MHz, 
>        CCB:333.333 MHz,
>        DDR:166.667 MHz (333.333 MT/s data rate), LBC:41.667 MHz
> CPM:   333.333 MHz
> L1:    D-cache 32 kB enabled
>        I-cache 32 kB enabled
> Board: TQM8555, serial# ABC0555 casl=25
> I2C:   ready
> DRAM:  128 MiB
> FLASH: 128 MiB
> L2:    256 KB already enabled
> 
>    PCI1:  32 bit, 33 MHz, sync, host, arbiter

Its unclear what the correct behavior is here.  I just did a quick
sample of recent Freescale reference boards and generally see:
p1020ds/p2020dsmpc8572: printf("    PCIE%u connected to %s as %s (base addr %lx)\n",

Older boards with PCI often look like:
mpc8548/mpc8568mds: printf ("\n    PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",

The TQM boards, socrates, and mpc8349 are/were:
printf ("PCI1:  %d bit, %s MHz, %s, %s, %s\n");

So the original behavior of the TQM board was out of sync with the
majority of other boards, and some boards have a newline.

I agree we should get rid of the newline on all these printfs, but the
indentation issue is murkier to me.  The common Freescale PCI code
currently assumes there is an indentation, so we should really sync
boards'/FSL indentation up to be consistent.  Anyone have a strong
preference for the indentation?  p2020 way, or socrates way above?

>                Scanning PCI bus 00
>     PCIE1 on bus 00 - 00

I just sent a patch to address this issue.

Best,
Peter