[U-Boot] [PATCH 4/4] powerpc/85xx: Implement work-around for P4080 erratum SERDES-A001

[Kumar Gala]

On Apr 22, 2011, at 8:34 AM, Kumar Gala wrote:

> From: Timur Tabi <timur at freescale.com>
> 
> Bank powerdown through RCW[SRDS_LPD_Bn] for XAUI on FM2 and SGMII on FM1
> are swapped.
> 
> Erratum SERDES-A001 says that if bank two is kept disabled and after bank
> three is enabled, then the PLL for bank three won't lock properly.  The
> work-around is to enable and then disable bank two after bank three is
> disabled.
> 
> Signed-off-by: Timur Tabi <timur at freescale.com>
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c |   80 ++++++++++++++++++++-----
> arch/powerpc/include/asm/config_mpc85xx.h     |    1 +
> 2 files changed, 65 insertions(+), 16 deletions(-)

applied to 85xx

- k