[U-Boot] [PATCH] [v2] powerpc/85xx: fix compatible property for the L2 cache node

[Wolfgang Denk]

Dear Timur Tabi,

In message <1304089126-11945-1-git-send-email-timur at freescale.com> you wrote:
> The compatible property for the L2 cache node (on 85xx systems that don't
> have a CPC) was using a value for the property length that did not match
> the actual length of the property.
> 
> Signed-off-by: Timur Tabi <timur at freescale.com>
> ---
>  arch/powerpc/cpu/mpc85xx/fdt.c |   13 +++++++------
>  1 files changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
> index 642f6c5..a3a4b65 100644
> --- a/arch/powerpc/cpu/mpc85xx/fdt.c
> +++ b/arch/powerpc/cpu/mpc85xx/fdt.c
> @@ -165,7 +165,6 @@ static inline void ft_fixup_l2cache(void *blob)
>  	int len, off;
>  	u32 *ph;
>  	struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
> -	char compat_buf[38];
>  
>  	const u32 line_size = 32;
>  	const u32 num_ways = 8;
> @@ -192,22 +191,24 @@ static inline void ft_fixup_l2cache(void *blob)
>  	}
>  
>  	if (cpu) {
> +		char compat_buf[40];
> +
>  		if (isdigit(cpu->name[0]))
>  			len = sprintf(compat_buf,
> -				"fsl,mpc%s-l2-cache-controller", cpu->name);
> +				"fsl,mpc%s-l2-cache-controller" "%c" "cache",
> +				cpu->name, 0);

This is a somewhat funny and complicated way of writing

				"fsl,mpc%s-l2-cache-controller\0cache"

which, when written in plain text, reveals what sort of trickery you
are doing here.

This code is a dirty hack, and I will not accept it.

Best regards,

Wolfgang Denk

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