[U-Boot] [PATCH] spi: Tegra2: Add SPI driver for SPIFLASH on Seaboard

Mike Frysinger vapier at gentoo.org
Sat Apr 30 01:21:09 CEST 2011


On Thursday, April 28, 2011 10:55:13 Tom Warren wrote:
> Signed-off-by: Tom Warren <twarren at nvidia.com>
> ---
> This patch adds support for the SPIFLASH peripheral on Tegra2 (SPI 1).
> Probe, erase, read and write are all supported, as well as low-level
> SPI commands via 'sspi'.
> 
> Note that, at this time, only Seaboard has a SPI flash part (Winbond).
> With this code, I've written U-Boot to SPI from within U-Boot, and
> booted the system from that SPI image (boot sel jumpers must be set
> to SPI [1000], and the UART ENABLE jumper must be set to GPIO CTRL).

so this is a driver for a SPI bus, and the board you're working on just 
happens to have some SPI flashes connected to it ?  then the "SPIFLASH" part 
is irrelevant, as is the board in question.  please remove references to both 
and just refer to this as "a SPI driver for Tegra2 processors".

> --- /dev/null
> +++ b/arch/arm/include/asm/arch-tegra2/tegra2_spi.h

if the only thing that uses this is the spi driver, then please put this in 
drivers/spi/tegra2_spi.h

> +#define	SPI_CMD_GO		(1 << 30)

dont put a tab after the #define

> --- a/arch/arm/lib/board.c
> +++ b/arch/arm/lib/board.c

this change needs to be split out into a dedicated one

> -

this new line should not be deleted

> +#if defined(CONFIG_CMD_SPI)
> +#include <spi.h>
> +#endif

no need to protect the inclusion.  just always include it.

>  #endif
> -
>  #if defined(CONFIG_CMD_NAND)

nor should this newline be deleted

>  	puts ("NAND:  ");
>  	nand_init();		/* go init the NAND */
>  #endif
> -
> +#if defined(CONFIG_CMD_SPI)

nor this newline

> +int spi_claim_bus(struct spi_slave *slave)
> +{
> +	/* Move bulk of spi_init code here? */

yes, so do that

> +void spi_release_bus(struct spi_slave *slave)
> +{

this func should be disabling the spi bus

> +void spi_cs_activate(struct spi_slave *slave)
> +{
> +	struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
> +	struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE;
> +	u32 val;
> +
> +	/*
> +	 * Delay here to clean up comms - spurious chars seen around SPI xfers.
> +	 * Fine-tune later.
> +	 */
> +	udelay(1000);

fine tune now ?

> +	/*
> +	 * On Seaboard, MOSI/MISO are shared w/UART.
> +	 * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
> +	 * Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
> +	 */
> +	gpio_direction_output(UART_DISABLE_GPIO, 1);

board specific issues shouldnt be in a processor driver

> +	int numBytes = (bitlen + 7) / 8;

no camel case.  use "num_bytes".

> +					for (i = 0; i < bytes; ++i) {
> +						((u8 *)din)[i] = (tmpdin >> 24);

create a dedicated pointer and deference that.  casts on the lhs are poor 
style.

> --- a/include/configs/seaboard.h
> +++ b/include/configs/seaboard.h

this should be split out into a dedicated patch
-mike
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